LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 84

The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2

LPC1850FET256

Manufacturer Part Number
LPC1850FET256
Description
The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC1850_30_20_10
Preliminary data sheet
7.15.3.1 Features
7.15.4.1 Features
7.15.2 Motor control PWM
7.15.3 Quadrature Encoder Interface (QEI)
7.15.4 Repetitive Interrupt (RI) timer
The motor control PWM is a specialized PWM supporting 3-phase motors and other
combinations. Feedback inputs are provided to automatically sense rotor position and use
that information to ramp speed up or down. An abort input is also provided that causes the
PWM to immediately release all motor drive outputs. At the same time, the motor control
PWM is highly configurable for other generalized timing, counting, capture, and compare
applications.
A quadrature encoder, also known as a 2-channel incremental encoder, converts angular
displacement into two pulse signals. By monitoring both the number of pulses and the
relative phase of the two signals, the user can track the position, direction of rotation, and
velocity. In addition, a third channel, or index signal, can be used to reset the position
counter. The quadrature encoder interface decodes the digital pulses from a quadrature
encoder wheel to integrate position over time and determine direction of rotation. In
addition, the QEI can capture the velocity of the encoder wheel.
The repetitive interrupt timer provides a free-running 32-bit counter which is compared to
a selectable value, generating an interrupt when a match occurs. Any bits of the
timer/compare can be masked such that they do not contribute to the match detection.
The repetitive interrupt timer can be used to create an interrupt that repeats at
predetermined intervals.
– Toggle on match.
– Do nothing on match.
Up to two match registers can be used to generate timed DMA requests.
Tracks encoder position.
Increments/decrements depending on direction.
Programmable for 2 or 4 position counting.
Velocity capture using built-in timer.
Velocity compare function with “less than” interrupt.
Uses 32-bit registers for position and velocity.
Three position compare registers with interrupts.
Index counter for revolution counting.
Index compare register with interrupts.
Can combine index and position interrupts to produce an interrupt for whole and
partial revolution displacement.
Digital filter with programmable delays for encoder input signals.
Can accept decoded signal inputs (clk and direction).
32-bit counter. Counter can be free-running or be reset by a generated interrupt.
All information provided in this document is subject to legal disclaimers.
Rev. 3.1 — 15 December 2011
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
© NXP B.V. 2011. All rights reserved.
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