STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 178

• Manufacturer Part Number: STM32W108CZ
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108CZ

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

Analog-to-digital converter
11.1.8
178/232
If the DMA is running when ADC_CFG is modified, the DMA does not stop, so the DMA
buffer may contain conversion results from both the old and new configurations.
The following procedure illustrates a simple polled method of using the ADC. After
completing the procedure, the latest conversion results is available in the location written to
by the DMA. This assumes that any GPIOs and the voltage reference have already been
configured.
1.
2.
3.
4.
5.
6.
To convert multiple inputs using this approach, repeat Steps 4 through 6, loading the desired
input configurations to ADC_CFG in Step 5. If the inputs can use the same offset/gain
correction, just repeat Steps 5 and 6.
Calibration
Sampling of internal connections GND, VREF/2, and VREF allow for offset and gain
calibration of the ADC in applications where absolute accuracy is important. Offset error is
calculated from the minimum input and gain error is calculated from the full scale input
range. Correction using VREF is recommended because VREF is calibrated by the ST
software against VDD_PADSA. The VDD_PADSA regulator is factory-trimmed to 1.80 V ±
20 mV. If better absolute accuracy is required, the ADC can be configured to use an external
reference. The ADC calibrates as a single-ended measurement. Differential signals require
correction of both their inputs.
Table 111
Table 111. ADC gain and offset correction equations
Gain
Offset (after applying gain correction)
Allocate a 16-bit signed variable, for example analogData, to receive the ADC output.
(Make sure that analogData is half-word aligned – that is, at an even address.)
Disable all ADC interrupts – write 0 to INT_ADCCFG.
Set up the DMA to output conversion results to the variable, analogData.
Reset the DMA – set the ADC_DMARST bit in ADC_DMACFG.
Define a one sample buffer – write analogData’s address to ADC_DMABEG, set
ADC_DMASIZE to 1.
Write the desired offset and gain correction values to the ADC_OFFSET and
ADC_GAIN registers.
Start the ADC and the DMA.
Write the desired conversion configuration, with the ADC_EN bit set, to ADC_CFG.
Clear the ADC buffer full flag – write INT_ADCULDFULL to INT_ADCFLAG.
Start the DMA in auto wrap mode – set the ADC_DMAAUTOWRAP and
ADC_DMALOAD bits in ADC_DMACFG.
Wait until the INT_ADCULDFULL bit is set in INT_ADCFLAG, then read the result from
analogData.
shows the equations used to calculate the gain and offset correction values.
Calibration
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Doc ID 16252 Rev 13
32768
2
Correction value
×
(
×
57344 N
------------------------------------------
(
N
VREF
–
16384
–
GND
N
GND
)
)