STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 191

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STM32W108CZ

Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108CZ

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Interrupts
If another enabled second-level interrupt event of the same type occurs before the first
interrupt event is cleared, the second interrupt event is lost because no counting or queuing
is used. However, this condition is detected and stored in the top-level INT_MISS register to
facilitate software detection of such problems. The INT_MISS register is "acknowledged" in
the same way as the INT_periphFLAG register-by writing a 1 into the corresponding bit to be
cleared.
Table 124
provides a map of all peripheral interrupts. This map lists the top level NVIC
Interrupt bits and, if there is one, the corresponding second level EM Interrupt register bits
that feed the top level interrupts.
Doc ID 16252 Rev 13
191/232

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