STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 50

• Manufacturer Part Number: STM32W108CZ
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108CZ

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

System modules
Table 17.
Table 18.
50/232
31
15
31
15
30
14
30
14
Bits [15:0]
Sleep timer compare B low register (SLEEPTMR_CMPBL)
Address:
Reset value:
Sleep timer compare B low register (SLEEPTMR_CMPBL)
Sleep timer interrupt source register (INT_SLEEPTMRFLAG)
Address:
Reset value:
Sleep timer interrupt source register (INT_SLEEPTMRFLAG)
Bit 2
Bit 1
Bit 0
29
13
29
13
SLEEPTMR_CMPBL_FIELD:
INT_ SLEEPTMR CMPB: Sleep timer compare B
Note: Bits are cleared when set to ‘1’.
INT_SLEEPTMRCMPA: Sleep timer compare A
Note: Bits are cleared when set to ‘1’.
INT_SLEEPTMRWRAP: Sleep timer overflow
Note: Bits are cleared when set to ‘1’.
Sleep timer compare B low value [15:0].
Writing to this register puts value in hold register until a write to the SLEEPTMR_CMPBH
register.
Can only be changed when the ENABLE bit (bit 11 of SLEEP_CONFIG register) is set to ‘0’.
If changed when the ENABLE bit is set to ‘1’, a spurious interrupt may be generated.
Therefore it is recommended to disable interrupts before changing this register.
28
12
28
12
27
11
27
11
0x4000 A014
0x4000 6024
0x0000 FFFF
0x0000 0000
26
10
26
10
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Reserved
25
25
9
9
r
Doc ID 16252 Rev 13
SLEEPTMR_CMPBL
24
24
8
8
Reserved
Reserved
rw
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
19
19
3
3
SLEEP
CMPB
INT_
TMR
18
18
rw
2
2
SLEEP
CMPA
INT_
TMR
17
17
rw
1
1
SLEEP
WRAP
INT_
TMR
16
16
rw
0
0