ST72561R9 STMicroelectronics, ST72561R9 Datasheet - Page 172

• Manufacturer Part Number: ST72561R9
• Description: 8-BIT MCU WITH FLASH OR ROM, 10-BIT ADC, 5 TIMERS, SPI, LINSCI(TM), ACTIVE CAN
• Manufacturer: STMicroelectronics

Specifications of ST72561R9

• Hdflash Endurance: 100 cycles, data retention 40 years at 85°C
• 5 Power Saving Modes: Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow

ST72561
beCAN CONTROLLER (Cont’d)
Figure 96. beCAN Operating Modes
10.9.3 Operating Modes
The beCAN has three main operating modes: Ini-
tialization, Normal and Sleep. After a hardware re-
set, beCAN is in Sleep mode to reduce power con-
sumption. The software requests beCAN to enter
Initialization or Sleep mode by setting the INRQ or
SLEEP bits in the CMCR register. Once the mode
has been entered, beCAN confirms it by setting
the INAK or SLAK bits in the CMSR register. When
neither INAK nor SLAK are set, beCAN is in Nor-
mal mode. Before entering Normal mode beCAN
always has to synchronize on the CAN bus. To
synchronize, beCAN waits until the CAN bus is
idle, this means 11 consecutive recessive bits
have been monitored on CANRX.
10.9.3.1 Initialization Mode
The software initialization can be done while the
hardware is in Initialization mode. To enter this
mode the software sets the INRQ bit in the CMCR
register and waits until the hardware has con-
firmed the request by setting the INAK bit in the
CMSR register.
To leave Initialization mode, the software clears
the INQR bit. beCAN has left Initialization mode
once the INAK bit has been cleared by hardware.
While in Initialization mode, all message transfers
to and from the CAN bus are stopped and the sta-
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NORMAL
SLAK= 0
INAK = 0
SLEEP
RESET
SLAK= 1
INAK = 0
INRQ
SLAK= X
INAK = X
SYNC
tus of the CAN bus output CANTX is recessive
(high).
Entering Initialization Mode does not change any
of the configuration registers.
To initialize the CAN Controller, software has to
set up the Bit Timing registers and the filter banks.
If a filter bank is not used, it is recommended to
leave it non active (leave the corresponding FACT
bit cleared).
10.9.3.2 Normal Mode
Once the initialization has been done, the software
must request the hardware to enter Normal mode,
to synchronize on the CAN bus and start reception
and transmission. Entering Normal mode is done
by clearing the INRQ bit in the CMCR register and
waiting until the hardware has confirmed the re-
quest by clearing the INAK bit in the CMSR regis-
ter. Afterwards, the beCAN synchronizes with the
data transfer on the CAN bus by waiting for the oc-
currence of a sequence of 11 consecutive reces-
sive bits (≡ Bus Idle) before it can take part in bus
activities and start message transfer.
The initialization of the filter values is independent
from Initialization mode but must be done while the
filter bank is not active (corresponding FACTx bit
cleared). The filter bank scale and mode configu-
ration must be configured in initialization mode.
INITIALIZATION
SLAK= 0
INAK = 1