ST72561R9 STMicroelectronics, ST72561R9 Datasheet - Page 201

• Manufacturer Part Number: ST72561R9
• Description: 8-BIT MCU WITH FLASH OR ROM, 10-BIT ADC, 5 TIMERS, SPI, LINSCI(TM), ACTIVE CAN
• Manufacturer: STMicroelectronics

Specifications of ST72561R9

• Hdflash Endurance: 100 cycles, data retention 40 years at 85°C
• 5 Power Saving Modes: Halt, Auto Wake Up From Halt, Active Halt, Wait and Slow

beCAN CONTROLLER (Cont’d)
MAILBOX DATA LENGTH CONTROL REGIS-
TER (MDLC)
All bits of this register is write protected when the
mailbox is not in empty state.
Read / Write
Reset Value: xxxx xxxx (xxh)
Bit 7 = Reserved, must be kept cleared.
Bits 6:4 = Reserved, forced to 0 by hardware.
Bits 3:0 = DLC[3:0] Data Length Code
This field defines the number of data bytes a data
frame contains or a remote frame request.
7
0
0
0
0
DLC3
DLC2
DLC1
DLC0
0
MAILBOX DATA REGISTERS (MDAR[7:0])
All bits of this register are write protected when the
mailbox is not in empty state.
Read / Write
Reset Value: Undefined
Bits 7:0 = DATA[7:0] Data
A data byte of the message. A message can con-
tain from 0 to 8 data bytes.
DATA7
7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
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DATA0
0