ST7FOXK1 STMicroelectronics, ST7FOXK1 Datasheet - Page 86

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ST7FOXK1

Manufacturer Part Number
ST7FOXK1
Description
Low cost flash 8bit micro
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST7FOXK1

4 To 8 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection In-circuit Programming And In-application Programming (icp And Iap) Endurance
1K write/erase cycles guaranteed Data retention
Clock Sources
Internal trimmable 8 MHz RC oscillator, auto wakeup internal low power - low frequency oscillator, crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wakeup from Halt, Wait and Slow
A/d Converter
up to 10 input channels

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On-chip peripherals
Note:
86/226
2
3
1
Figure 39. PWM signal from 0% to 100% duty cycle
Dead time generation
A dead time can be inserted between PWM0 and PWM1 using the DTGR register. This is
required for half-bridge driving where PWM signals must not be overlapped. The non-
overlapping PWM0/PWM1 signals are generated through a programmable dead time by
setting the DTE bit.
DTGR[7:0] is buffered inside so as to avoid deforming the current PWM cycle. The DTGR
effect will take place only after an overflow.
Dead time is generated only when DTE=1 and DT[6:0]
PWM output signals will be at their reset state.
Half Bridge driving is possible only if polarities of PWM0 and PWM1 are not inverted, i.e. if
OP0 and OP1 are not set. If polarity is inverted, overlapping PWM0/PWM1 signals will be
generated.
Dead Time generation does not work at 1msec timebase.
DCRx=FFDh
DCRx=FFEh
DCRx=000h
DCRx=000h
COUNTER
f
COUNTER
FFDh
Dead time
FFEh
ATR= FFDh
FFFh
=
DT 6:0
[
FFDh
] Tcounter1
×
ST7FOXF1, ST7FOXK1, ST7FOXK2
FFEh
0
.
If DTE is set and DT[6:0]=0,
FFFh
FFDh
FFEh
t

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