TDA8262HN/C1,118 NXP Semiconductors, TDA8262HN/C1,118 Datasheet - Page 14

IC SATELLITE TUNER 32-HVQFN

TDA8262HN/C1,118

Manufacturer Part Number
TDA8262HN/C1,118
Description
IC SATELLITE TUNER 32-HVQFN
Manufacturer
NXP Semiconductors
Type
Satellite Tunerr
Datasheet

Specifications of TDA8262HN/C1,118

Package / Case
*
Applications
Demodulation
Mounting Type
Surface Mount
Bus Type
I2C
Maximum Agc
60 dB (Typ)
Maximum Frequency
2175 MHz
Minimum Frequency
950 MHz
Modulation Technique
QPSK
Mounting Style
SMD/SMT
Function
Satellite
Noise Figure
7.7 dB
Operating Supply Voltage
3.3 V
Supply Voltage (min)
3.15 V
Supply Voltage (max)
3.45 V
Minimum Operating Temperature
- 20 C
Maximum Operating Temperature
+ 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935275321118
TDA8262HN/C1-T
TDA8262HN/C1-T
Philips Semiconductors
9397 750 13194
Product data sheet
Table 18:
These bits force the inputs of the main loop charge pump. Thus the current and leakage
measurement could be done. This test could be used also to force the LC VCO at its maximum or
minimum tuning voltage.
Table 19:
These bits force the inputs of the second loop charge pump. This test could be used to force the LO
VCO at its maximum or minimum tuning voltage.
Table 20:
Table 21:
These bits control the amplitude of the internal LC VCO.
Table 22:
Bit PORT1 controls the use of PORT1 and bit PORT0 controls the use of PORT0. Outputs PORTn
are realized with open-drain NMOS transistors.
Table 23:
This bit controls the duration of the wait time of the calibration. This time is used to wait PLL locking
after programming a Dword. The reference clock of the time is the comparison frequency of the PLL
AMPVCO[2:0]
Binary value
CP2TST
CPTST
0
1
1
1
1
0
1
1
CALTIME
CPHIGH
PORTn
0
1
0
1
0
1
Main loop charge pump test; bits CPTST, FUP and FDN
Second loop charge pump test; bits CP2TST and FPFD2
Select main loop charge-pump current; bit CPHIGH
Amplitude of the internal VCO; bits AMPVCO[2:0]
Control port output; bits PORT[1:0]
Calibration wait time control; bit CALTIME
FPFD2
FUP
X
X
0
0
1
1
0
1
Value
The allowed value is AMPVCO[2:0] = 100 (decimal 4). The product is
specified only with this value, other settings may lead to different
performance.
Rev. 01 — 14 December 2004
Actions
test disable
sink on and source off; LO VCO maximum frequency measurement
sink off and source on; LO VCO minimum frequency measurement
Action
first charge pump active (low currents)
second charge pump active (high currents)
Action
PORTn at high-impedance
PORTn in sink mode; minimum 9 mA drive capability
f
28673
32769
c
divider ratio
FDN
X
0
1
0
1
Actions
test disable
sink and source off; leakage measurement
sink off and source on; source measurement
sink on and source off; sink measurement
sink on and source on
Wait time for f
28.673
32.769
Fully integrated satellite tuner
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
TDA8262HN
comp
= 1 MHz (ms)
14 of 30

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