MM74HC244WMX Fairchild Semiconductor, MM74HC244WMX Datasheet

IC BUFF/DVR TRI-ST DUAL 20SOIC

MM74HC244WMX

Manufacturer Part Number
MM74HC244WMX
Description
IC BUFF/DVR TRI-ST DUAL 20SOIC
Manufacturer
Fairchild Semiconductor
Series
74HCr
Datasheet

Specifications of MM74HC244WMX

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
7.8mA, 7.8mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Logic Family
74HC
Number Of Channels Per Chip
Octal
Polarity
Non-Inverting
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
High Level Output Current
- 7.8 mA
Input Bias Current (max)
8 uA
Low Level Output Current
7.8 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
165 ns @ 2 V or 33 ns @ 4.5 V or 28 ns @ 6 V
Logical Function
Buffer/Line Driver
Number Of Elements
2
Number Of Channels
8
Number Of Inputs
8
Number Of Outputs
8
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
SOIC W
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
2V
Quiescent Current
8uA
Technology
CMOS
Pin Count
20
Mounting
Surface Mount
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MM74HC244WMX
MM74HC244WMXTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MM74HC244WMX
Manufacturer:
FAIR
Quantity:
700
Part Number:
MM74HC244WMX
Manufacturer:
FSC
Quantity:
20 000
© 2005 Fairchild Semiconductor Corporation
MM74HC244WM
MM74HC244SJ
MM74HC244MTC
MM74HC244N
MM74HC244
Octal 3-STATE Buffer
General Description
The MM74HC244 is a non-inverting buffer and has two
active low enables (1G and 2G); each enable indepen-
dently controls 4 buffers. This device does not have
Schmitt trigger inputs.
These 3-STATE buffers utilize advanced silicon-gate
CMOS technology and are general purpose high speed
non-inverting buffers. They possess high drive current out-
puts which enable high speed operation even when driving
large bus capacitances. These circuits achieve speeds
comparable to low power Schottky devices, while retaining
the advantage of CMOS circuitry, i.e., high noise immunity,
and low power consumption. All three devices have a
fanout of 15 LS-TTL equivalent inputs.
All inputs are protected from damage due to static dis-
charge by diodes to V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
CC
MTC20
Top View
and ground.
M20D
M20B
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS005327
Features
Truth Table
H
L
Z
Typical propagation delay: 14 ns
3-STATE outputs for connection to system buses
Wide power supply range: 2–6V
Low quiescent supply current: 80
Output current: 6 mA
LOW Level
High Impedance
HIGH Level
Package Description
1G
H
H
L
L
1A
H
H
L
L
1Y
H
L
Z
Z
September 1983
Revised May 2005
2G
H
H
L
L
P
A
www.fairchildsemi.com
2A
H
H
L
L
2Y
H
L
Z
Z

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MM74HC244WMX Summary of contents

Page 1

... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Top View © 2005 Fairchild Semiconductor Corporation Features Typical propagation delay 3-STATE outputs for connection to system buses Wide power supply range: 2– ...

Page 2

Logic Diagram www.fairchildsemi.com 2 ...

Page 3

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) ...

Page 4

AC Electrical Characteristics q 5V Symbol Parameter Maximum Propagation PHL PLH Delay Maximum Enable Delay PZH PZL to Active Output t , ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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