FAN6920MR Fairchild Semiconductor, FAN6920MR Datasheet - Page 4

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FAN6920MR

Manufacturer Part Number
FAN6920MR
Description
The highly integrated FAN6920MR combines Power Factor Correction (PFC) controller and quasi-resonant PWM controller
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2010 Fairchild Semiconductor Corporation
FAN6920MR • Rev. 1.0.5
Marking Information
Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
CSPWM
RANGE
CSPFC
Name
COMP
INV
16
The RANGE pin’s impedance changes according to VIN pin voltage level. When the input voltage
detected by the VIN pin is higher than a threshold voltage, it sets to low impedance; whereas it
sets to high impedance if input voltage is at a high level.
Output pin of the error amplifier. It is a transconductance-type error amplifier for PFC output
voltage feedback. Proprietary multi-vector current is built-in to this amplifier; therefore, the
compensation for PFC voltage feedback loop allows a simple compensation circuit between this
pin and GND.
Inverting input of the error amplifier. This pin is used to receive PFC voltage level by a voltage
divider and provides PFC output over- and under-voltage protections. This pin also controls the
PWM startup. Once the FAN6920MR is turned on and V
Input to the PFC over-current protection comparator that provides cycle-by-cycle current limiting
protection. When the sensed voltage across the PFC current-sensing resistor reaches the internal
threshold (0.82V typical), the PFC switch is turned off to activate cycle-by-cycle current limiting.
Input to the comparator of the PWM over-current protection and performs PWM current-mode
control with FB pin voltage. A resistor is used to sense the switching current of the PWM switch
and the sensing voltage is applied to the CSPWM pin for the cycle-by-cycle current limit, current-
mode control, and high / low line over-power compensation according to DET pin source current
during PWM t
1
FAN6920FO
TPM
ZXYTT
ON
time.
CSPWM
RANGE
CSPFC
OPWM
COMP
OPFC
VDD
INV
Figure 4. Pin Configuration
Figure 3. Marking Diagram
1
4
5
6
7
8
2
3
Z -
X -
Y -
TT -
F -
O -
T -
P -
M -
4
- Fairchild Logo
Plant Code
Year Code
Week Code
Frequency (M = Low, H = High Level)
Package Type (M = SOP)
Y = Green Compound
OLP Mode (L = Latch, R = Recovery)
Manufacturing Flow Code
Die Run Code
Description
16
15
14
13
12
10
11
9
DET
GND
N.C.
HV
ZCD
VIN
RT
FB
INV
exceeds in 2.3V, PWM starts.
Continued on the following page…
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