FAN73932 Fairchild Semiconductor, FAN73932 Datasheet

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FAN73932

Manufacturer Part Number
FAN73932
Description
The FAN73932 is a half-bridge, gate-drive IC with shutdown and dead-time functions which can drive highspeed MOSFETs and IGBTs that operate up to +600V
Manufacturer
Fairchild Semiconductor
Datasheet
FAN73932 • Rev. 1.0.1
© 2008 Fairchild Semiconductor Corporation
FAN73932
Half-Bridge Gate Drive IC
Features
Applications
Ordering Information
Floating Channel for Bootstrap Operation to +600V
Typically 2.5A/2.5A Sourcing/Sinking Current Driving
Capability
Extended Allowable Negative V
Signal Propagation at V
High-Side Output in Phase of IN Input Signal
3.3V and 5V Input Logic Compatible
Matched Propagation Delay for Both Channels
Built-in Shutdown Function
Built-in UVLO Functions for Both Channels
Built-in Common-Mode dv/dt Noise Canceling Circuit
Internal 400ns Minimum Dead-Time
High-Speed Power MOSFET and IGBT Gate Driver
Induction Heating
High-Power DC-DC Converter
Synchronous Step-Down Converter
Motor Drive Inverter
Part Number
FAN73932MX
FAN73932M
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Package
BS
8-SOP
=15V
S
Swing to -9.8V for
Temperature Range
-40°C to +125°C
Operating
Description
The FAN73932 is a half-bridge, gate-drive IC with shut-
down and dead-time functions which can drive high-
speed MOSFETs and IGBTs that operate up to +600V. It
has a buffered output stage with all NMOS transistors
designed for high pulse current driving capability and
minimum cross-conduction.
Fairchild’s high-voltage process and common-mode
noise canceling techniques provide stable operation of
the high-side driver under high dv/dt noise circum-
stances. An advanced level-shift circuit offers high-side
gate driver operation up to V
V
The UVLO circuit prevents malfunction when V
V
The high-current and low-output voltage drop feature
makes this device suitable for all kinds of half- and full-
bridge inverters, like motor drive inverter, switching
mode power supply, induction heating, and high-power
DC-DC converter applications.
BS
BS
=15V.
are lower than the specified threshold voltage.
Eco Status
RoHS
8-SOP
Packing Method
S
=-9.8V (typical) for
Tape & Reel
Tube
February 2010
www.fairchildsemi.com
DD
and

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FAN73932 Summary of contents

Page 1

... For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 Description The FAN73932 is a half-bridge, gate-drive IC with shut- down and dead-time functions which can drive high- speed MOSFETs and IGBTs that operate up to +600V. It has a buffered output stage with all NMOS transistors Swing to -9 ...

Page 2

... Typical Application Diagrams +15V PWM PWM IC Shutdown Control Internal Block Diagram IN 1 SCHMITT TRIGGER INPUT 200K 5V SHOOT THOUGH PREVENTION 2 SD DEAD-TIME { 400ns } © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0 BOOT V COM BOOT ...

Page 3

... © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0 COM Figure 3. Pin Configuration (Top View) Description Logic Input for High-Side and Low-Side Gate Driver Output, In-Phase with HO Logic Input for Shutdown Ground Low-Side Driver Return ...

Page 4

... Low-Side Output Voltage LO V Logic Input Voltage (IN Logic Input Voltage (SD Operating Ambient Temperature A Note: 4. Shutdown (SD) input is internally clamped with 5.2V. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 =25°C unless otherwise specified. A Parameter ( Parameter (4) Min. Max. Unit -0.3 625 -25 ...

Page 5

... Output High, Short-Circuit Pulsed Current O+ I Output Low, Short-Circuit Pulsed Current O- Allowable Negative Propagation to HO Note: 5 These parameters guaranteed by design. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 = 25°C, unless otherwise specified. The V A Test Condition V =0V, SD= =0V or 5V, SD= =20KHz, No Load, IN ...

Page 6

... Turn-Off Fall Time F Dead-Time: LO Turn-Off to HO Turn-On DT and HO Turn-Off to LO Turn-On MDT Dead-time matching=|DT Note: 6. The turn-on propagation delay time included dead-time. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 =1000pF, and T =25°C, unless otherwise specified Conditions ( ...

Page 7

... Temperature [°C] Figure 6. Turn-On Rise Time vs. Temperature -10 -20 -40 - Temperature [°C] Figure 8. Turn-On Delay Matching vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 280 240 200 160 120 100 120 -40 -20 Figure 5. Turn-Off Propagation Delay 30 20 ...

Page 8

... Figure 12. Quiescent V DD vs. Temperature 1200 1000 800 600 400 200 -40 - Temperature [°C] Figure 14. Operating V DD vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 (Continued) 300 250 200 150 100 100 120 -40 Figure 11. Shutdown Propagation Delay 120 100 ...

Page 9

... UVLO+ vs. Temperature DD 10.5 10.0 9.5 9.0 8.5 8.0 -40 - Temperature [°C] Figure 18. V UVLO+ vs. Temperature BS 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -40 - Temperature [°C] Figure 20. High-Level Output Voltage vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 (Continued) 9.5 9.0 8.5 8.0 7.5 - 100 120 Figure 17. V 10.0 9.5 9.0 8.5 8.0 7.5 7 100 120 -40 Figure 19. V 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 - ...

Page 10

... Temperature [°C] Figure 22. Logic High Input Voltage vs. Temperature -40 - Temperature [°C] Figure 24. Logic Input High Bias Current vs. Temperature © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 (Continued) 3.0 2.5 2.0 1.5 1.0 0 100 120 - -10 -11 -12 - 100 ...

Page 11

... Switching Time Definitions SD LO 1nF DT1 DT2 IN 50 OFF R 90 © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0 COM Figure 26. Switching Time Test Circuit Shutdown DT1 DT2 DT2 Figure 27 ...

Page 12

... 50% t OFF 90 IN(LO) 50% 50% IN(HO) 10% © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 50 90% Figure 29. Shutdown Waveform Definition DT LO-HO 10% MDT LO-HO HO-LO Figure 30. Dead-Time Waveform Definition 10% Figure 31. Delay Matching Waveform Definition 50% DT HO-LO 10% 90% t OFF 50% 50% MT off 90% 90% www ...

Page 13

... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FAN73932 • Rev. 1.0.1 5.00 4.80 A 3.81 ...

Page 14

... Fairchild Semiconductor Corporation FAN73932 Rev. 1.0.1 14 www.fairchildsemi.com ...

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