FAN5400 Fairchild Semiconductor, FAN5400 Datasheet - Page 27

• Manufacturer Part Number: FAN5400
• Description: The FAN5400 combines a highly integrated switched-mode charger, to minimize single-cell Lithium-ion (Li-ion) charging time from a USB power source, and a boost regulator to power a USB peripheral from the battery
• Manufacturer: Fairchild Semiconductor

Boost Mode
Boost Mode can be enabled if the IC is in 32-Second Mode
with the OTG pin and OPA_MODE bits as indicated in Table
16. The OTG pin ACTIVE state is 1 if OTG_PL=1 and 0
when OTG_PL=0.
If boost is active using the OTG pin, Boost Mode is initiated
even if the HZ_MODE=1. The HZ_MODE bit overrides the
OPA_MODE bit.
Table 16. Enabling Boost
To remain in Boost Mode, the TMR_RST must be set by the
host before the t
Mode; the IC resets all registers, pulses the STAT pin, sets
the FAULT bits to 110, and resets the BOOST bit. VBUS
POR or reading R0 clears the fault condition.
Boost PWM Control
The IC uses a minimum on-time and computed minimum off-
time to regulate VBUS. The regulator achieves excellent
transient response by employing current-mode modulation.
This technique causes the regulator to exhibit a load line.
During PWM Mode, the output voltage drops slightly as the
input current rises. With a constant V
constant output resistance.
The “droop” caused by the output resistance when a load is
applied allows the regulator to respond smoothly to load
transients with no undershoot from the load line. This can be
seen in Figure 33 and Figure 43.
© 2009 Fairchild Semiconductor Corporation
FAN5400 Family • Rev. 1.0.7
OTG_EN
350
325
300
275
250
225
200
X
X
1
0
1
0
2.0
Figure 43. Output Resistance (R
2.5
ACTIVE
ACTIVE
ACTIVE
ACTIVE
32S
OTG
Pin
X
X
timer times out. If t
Battery Voltage, V
3.0
MODE
HZ_
3.5
X
0
X
1
1
0
BAT
(V)
BAT
4.0
32S
MODE
OPA_
, this appears as a
times out in Boost
X
X
1
0
1
0
OUT
4.5
)
BOOST
Disabled
Disabled
Disabled
Disabled
Enabled
Enabled
5.0
27
V
regulator is in PWM Mode (continuous conduction) as:
At V
At V
PFM Mode
If V
off-time has ended, the regulator enters PFM Mode. Boost
pulses are inhibited until V
on-time is increased to enable the output to pump up
sufficiently with each PFM boost pulse. Therefore the
regulator behaves like a constant on-time regulator, with the
bottom of its output voltage ripple at 5.07V in PFM Mode.
Table 17. Boost PWM Operating States
Startup
When the boost regulator is shut down, current flow is
prevented from V
V
LIN State
When EN rises, if V
attempts to bring PMID within 400mV of V
internal 450mA current source from VBAT (LIN State). If
PMID has not achieved V
state is initiated.
SS State
When PMID > V
switching with a reduced peak current limit of about 50% of
its normal current limit. The output slews up until V
within 5% of its set point; at which time, the regulation loop is
closed and the current limit is set to 100%.
If the output fails to achieve 95% of its set point (V
128s, the current limit is increased to 100%. If the output
fails to achieve 95% of its set point after this second 384s
period, a fault state is initiated.
Mode
BUS
BUS
BST
LIN
SS
BUS
BAT
BAT
V
V
V
to V
as a function of I
OUT
OUT
OUT
=3.3V, and I
=2.7V, and I
> VREF
BAT



Boost Operating Mode
.
. 5
. 5
. 5
Boost Soft-Start
07
07
07
BOOST
Linear Startup
Description
BAT
BAT
LOAD

LOAD


. 0
R
. 0
to V
– 400mV, the boost regulator begins
(nominally 5.07V) when the minimum
OUT
26
327
BAT
=200mA, V
=200mA, V
LOAD
BAT

BUS
BUS

> UVLO

0
0
– 400mV after 560s, a FAULT
I
2 .
, as well as reverse flow from
LOAD
can be computed when the
2 .
< VREF


. 5
BUS
BUS
. 5
018
BST
005
would drop to:
would drop to:
V
, the regulator first
BOOST
BAT
Invoked When
V
SS Completed
V
www.fairchildsemi.com
V
V
> UVLO
BAT
BUS
. The minimum
BAT
> V
< V
BST
EQ. 1A
EQ. 1B
using an
BUS
BST
BST
EQ. 1
) within
BUS
and
is