FAN5401 Fairchild Semiconductor, FAN5401 Datasheet
FAN5401
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FAN5401 Summary of contents
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... FAN5400 / FAN5401 / FAN5402 / FAN5403 / FAN5404 / FAN5405 USB-Compliant Single-Cell Li-Ion Switching Charger with USB-OTG Boost Regulator Features Fully Integrated, High-Efficiency Charger for Single-Cell Li-Ion and Li-Polymer Battery Packs Faster Charging than Linear 0.5% at 25°C Charge Voltage Accuracy: 1% from 0 to 125°C ...
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... FAN5403UCX -40 to 85°C FAN5404UCX -40 to 85°C FAN5405UCX -40 to 85°C Table 1. Feature Comparison Summary Part Slave PN Bits: Number Address REG3[4:3] FAN5400 01 1101011 FAN5401 00 1101011 FAN5402 01 1101011 FAN5403 10 1101011 FAN5404 11 1101011 FAN5405 10 1101010 Note: 1. Special charger is a current limited charger that is not a USB compliant source. ...
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... Block Diagram VBUS C IN1 PMID Q1A Greater than VBAT ON Less than VBAT OFF © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Figure 2. IC and System Block Diagram PMID Q3 CHARGE PUMP Q1 Q1A CSIN Q1B SW Q1B Q2 OFF ON PGND VBAT SYSTEM Figure 3. Power Stage ...
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... Bypass this pin with a 0.1F capacitor to PGND. FAN5400, Auxiliary Power. Connect to the battery pack to provide IC power during High-Impedance E2 AUXPWR FAN5401, Mode. Bypass with a 1F capacitor to PGND. FAN5402 FAN5403, Charge Disable. If this pin is HIGH, charging is disabled. When LOW, charging is ...
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... T J(max) Symbol Parameter Junction-to-Ambient Thermal Resistance JA Junction-to-PCB Thermal Resistance JB © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Parameter Continuous Pulsed, 100ms Maximum Non-Repetitive Human Body Model per JESD22-A114 Charged Device Model per JESD22-C101 Parameter T < ...
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... Input Bias Current IN Charge Termination Detection Termination Current Range I (TERM) Termination Current Accuracy Termination Current Deglitch Time 1.8V Linear Regulator V 1.8V Regulator Output REG © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Conditions V > PWM Switching BUS BUS(min) V > PWM Enabled, BUS ...
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... Oscillator Frequency SW D Maximum Duty Cycle MAX D Minimum Duty Cycle MIN Synchronous to Non-Synchronous I SYNC Current Cut-Off Threshold © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Conditions To Initiate and Pass VBUS Validation During Charging I Set to 100mA IN I Set to 500mA IN V > > ...
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... Q2 always turns on for 60ns, then turns off if current is below I 6. Guaranteed by design; not tested in production. 7. This tolerance (%) applies to all timers on the IC, including soft-start and deglitching timers. © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Conditions 2.5V < V < 4.5V, I from 0 to ...
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... SCL Fall Time FCL SDA Rise Time t Rise Time of SCL after a RDA Repeated START Condition t RCL1 and after ACK Bit © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Conditions Standard Mode Fast Mode High-Speed Mode, C < 100pF B High-Speed Mode, C < 400pF ...
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... REPEATED START = MCS Current Source Pull- Resistor Pull-up P Note A: First rising edge of SCLH after Repeated Start and after each ACK bit. Figure 6. I © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Conditions Standard Mode Fast Mode High-Speed Mode, C < 100pF B High-Speed Mode, C < ...
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... V BAT Load Current (mA) Figure 9. Charger Efficiency Figure 11. Auto-Charge Startup =100mA, OTG=1, V INLIM © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =4.2V, V =5.0V, and T OREG BUS 900 800 700 600 500 400 300 200 100 4 4 ...
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... Figure 13. AutoCharge Startup with 300mA Limited Charger / Adaptor, I =500mA, OTG=1, V INLIM Figure 15. Battery Removal / Insertion during Charging, V =3.9V, I =950mA BAT OCHARGE © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =4.2V, V =5.0V, and T =25°C. OREG BUS A Figure 14. Charger Startup with HZ_MODE Bit Reset, =3.4V ...
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... Power-up; FAN5400, FAN5403 Figure 18. No Battery at V BUS 200 150 -30C +25C +85C 100 50 0 4.0 4.5 5.0 Input Voltage, V BUS Figure 19. VBUS Current in High-Impedance Mode with Battery Open © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =4.2V, V =5.0V, and T OREG BUS 1.82 1.81 1.80 1.79 1.78 1.77 5.5 6.0 0 (V) 13 =25°C. ...
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... V Load Current (mA) BUS Figure 23. Output Regulation vs. V 250 200 150 100 50 2 2.5 3 3.5 Battery Voltage, V Figure 25. Quiescent Current © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =3.6V, T =25°C. BAT A 100 2.7VBAT 80 3.6VBAT 4.2VBAT 75 200 250 300 0 BAT 5 ...
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... Unless otherwise specified, using circuit of Figure 1, V Figure 27. Boost PWM Waveform 100 150 V Load Current (mA) BUS Figure 29. Output Ripple vs. V © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =3.6V, T =25°C. BAT A Figure 28. Boost PFM Waveform 30 2.7VBAT 3.6VBAT 25 4.2VBAT 4.5VBAT ...
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... Boost Mode Typical Characteristics Unless otherwise specified, using circuit of Figure 1, V Figure 31. Startup, 3.6V , 44 Load, Additional 10µF, BAT X5R Across V Figure 33. Load Transient, 5-155-5mA, t © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =3.6V, T =25°C. BAT A Figure 32. V BUS =t =100ns Figure 34. Load Transient, 5-255-5mA, t ...
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... V reaches V BAT charging circuit is then started and the battery is charged © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 with a constant current if sufficient input power is available. The current slew rate is limited to prevent overshoot. The FAN540X is designed to work with a current-limited input source at VBUS ...
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... A new charge cycle begins when one of the following occurs: OUT The battery voltage falls below V VBUS Power On Reset (POR) clears and the battery voltage is below the weak battery threshold ( 4.14 This occurs for all versions except the FAN5401 4. 4. HZ_MODE is reset through I CONTROL1 (R1) register. ...
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... Table 7. Input Current Limit and below VBUS for OVP I INLIM For all versions except the FAN5401 and FAN5404, the OTG pin establishes the input current limit when t For the FAN5401 and FAN5404, no charging occurs automatically at VBUS POR, so the input current limit is established by the I 19 ...
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... Flow Charts © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Figure 37. Charger VBUS POR 20 www.fairchildsemi.com ...
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... Indicate Charging NO Disable Charging Timeout? Indicate VBUS Fault I OUT NO Termination enabled V BAT Stop Charging Enable IDET for T © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Disable Charging Indicate VBUS Fault Enable I , SHORT Reset Safety reg Indicate Charging T 15MIN YES NO HIGHZ mode < ...
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... Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Figure 39. Charge Configuration Figure 40. HZ-State 22 www.fairchildsemi.com ...
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... Charge Start Start T 15MIN T 15MIN Active? Figure 41. Timer Flow Chart for FAN5400, FAN5402, FAN5403, FAN5405 Reset T 32SEC YES Figure 42. Timer Flow Chart for FAN5401, FAN5404 © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Reset Registers NO Start T 32SEC YES Stop T 15MIN ...
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... If the host attempts to OREG write a value higher than VSAFE or ISAFE to OREG or IOCHARGE, respectively; the VSAFE, ISAFE value appears as the OREG, IOCHARGE register value, respectively. © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Table 9. I Bits (REG6[6:4]) ISAFE (REG6[6:4]) ...
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... OREG no further pulses occur for 30ms, the IC sets the FAULT bits to 100, sets the STAT bits to 11, and pulses the STAT pin. © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Battery Detection During Charging The IC can detect the presence, absence, or removal of a battery if the termination bit (TE) is set ...
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... Thermal Shutdown Timer Fault Battery © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Charge Mode Control Bits Setting either HZ_MODE or CE through I is set to No Limit. charger and puts the IC into High-Impedance Mode and resets t 32S t begins running and, when it overflows, all registers ...
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... Figure 33 and Figure 43. 350 325 300 275 250 225 200 2.0 2.5 3.0 3.5 Battery Voltage, V BAT Figure 43. Output Resistance (R © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0 function of I BUS regulator is in PWM Mode (continuous conduction) as: V OUT At V =3.3V, and I BAT V OUT At V =2.7V, and I ...
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... CURRENT 0 64 BOOST ENABLED Figure 44. Boost Response Attempting to Start into V Short Circuit (Times in s) © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 VREG Pin The VREG pin on FAN5400 - FAN5402 provides a voltage modulation protected from over-voltage surges on VBUS, which can be ON used to run auxiliary circuits ...
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... Charging Current Controlled by 3 ICHG I Control Loop CHARGE 2 IBUS I Limiting Charging Current BUS 1 VBUS_VALID V Not Valid BUS 0 CV Constant Current Charging © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 STATE 0 < – V ITERM CSIN BAT < 1mV V – V CSIN BAT V > V BAT SHORT V > ...
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... Slave Address HD;STA SDA SCL Figure 46. Start Bit A transaction ends with a STOP condition, which is defined as SDA transitioning from with SCL HIGH, as shown in Figure 47. © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 2 Mode I C-Bus® SDA SCL During a read from the FAN540X (Figure 50), the master ...
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... Bus control is signified by the shading of the packet, Master Drives Bus defined as and All addresses and data 7 bits S Slave Address 7 bits S Slave Address 0 © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Table 21. Bit Definitions for Figure 49, Figure 50 Symbol Slave Drives Bus . S are MSB first bits ...
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... Name Value Type CONTROL0 TMR_RST 7 1 OTG 0 R/W 6 EN_STAT 5:4 STAT BOOST 1 2:0 FAULT © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Register Name REG# CONTROL0 0 CONTROL1 1 OREG 2 03 IC_INFO or 3BH IBAT 4 SP_CHARGER 5 SAFETY 6 MONITOR 10H Register Address Writing a 1 resets the t timer ...
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... OTG pin active LOW OTG pin active HIGH Disables OTG pin Enables OTG pin Register Address Identifies Fairchild Semiconductor as the IC supplier R Part number bits, see the Ordering Info on page Revision, revision 1.X, where X is the decimal of these three bits Register Address: 04 ...
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... T_120 See 3 ICHG Table 19 2 IBUS 1 VBUS_VALID 0 CV © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 (Continued) Register Address Unused 1.8V regulator is ON 1.8V regulator is OFF Output current is controlled by IOCHARGE bits Voltage across R for output current control is set to 22.1mV (325mA for ...
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... In particular, the total loop length for CMID should be minimized to reduce overshoot and ringing on the SW, PMID, and VBUS pins. All power and ground pins must be © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 routed to their bypass capacitors using top copper if possible ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...
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... Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 37 www.fairchildsemi.com ...