FAN5403 Fairchild Semiconductor, FAN5403 Datasheet
FAN5403
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FAN5403 Summary of contents
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... FAN5400 / FAN5401 / FAN5402 / FAN5403 / FAN5404 / FAN5405 USB-Compliant Single-Cell Li-Ion Switching Charger with USB-OTG Boost Regulator Features Fully Integrated, High-Efficiency Charger for Single-Cell Li-Ion and Li-Polymer Battery Packs Faster Charging than Linear 0.5% at 25°C Charge Voltage Accuracy: 1% from 0 to 125°C ...
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... Table 1. Feature Comparison Summary Part Slave PN Bits: Number Address REG3[4:3] FAN5400 01 1101011 FAN5401 00 1101011 FAN5402 01 1101011 FAN5403 10 1101011 FAN5404 11 1101011 FAN5405 10 1101010 Note: 1. Special charger is a current limited charger that is not a USB compliant source. Table 2. Recommended External Components Component Description L1 1H, 20%, 1.3A, 2016 C 10 ...
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... Block Diagram VBUS C IN1 PMID Q1A Greater than VBAT ON Less than VBAT OFF © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Figure 2. IC and System Block Diagram PMID Q3 CHARGE PUMP Q1 Q1A CSIN Q1B SW Q1B Q2 OFF ON PGND VBAT SYSTEM Figure 3. Power Stage ...
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... Regulator Output. Connect to a 1F capacitor to PGND. This pin can supply up to 2mA of E3 VREG ALL DC load current. For FAN5400-FAN5402, the output voltage is PMID, which is limited to 6.5V. For FAN5403-FAN5405, the output voltage is regulated to 1.8V. Battery Voltage. Connect to the positive (+) terminal of the battery pack. Bypass with a E4 VBAT ALL 0.1 ...
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... T J(max) Symbol Parameter Junction-to-Ambient Thermal Resistance JA Junction-to-PCB Thermal Resistance JB © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Parameter Continuous Pulsed, 100ms Maximum Non-Repetitive Human Body Model per JESD22-A114 Charged Device Model per JESD22-C101 Parameter T < ...
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... V > BAT OREG RCH BUS SLP R =68m SENSE [V – from 3mV to 20mV CSIN BAT [V – from 20mV to 40mV CSIN BAT 2mV Overdrive I from 0 to 2mA, FAN5403-05 REG 6 and =25°C. J Min. Typ. Max. Units 10 mA 2.5 mA A 0.2 5.0 20 ...
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... Symbol Parameter Input Power Source Detection V VBUS Input Voltage Rising IN(MIN)1 V Minimum VBUS during Charge IN(MIN)2 t VBUS Validation Time VBUS_VALID ) (FAN5403 – FAN5405) Special Charger (V BUS V Special Charger Setpoint Accuracy SP Input Current Limit I Input Current Limit Threshold INLIM V Bias Generator REF ...
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... Q2 always turns on for 60ns, then turns off if current is below I 6. Guaranteed by design; not tested in production. 7. This tolerance (%) applies to all timers on the IC, including soft-start and deglitching timers. © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Conditions 2.5V < V < 4.5V, I from 0 to ...
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... SCL Fall Time FCL SDA Rise Time t Rise Time of SCL after a RDA Repeated START Condition t RCL1 and after ACK Bit © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Conditions Standard Mode Fast Mode High-Speed Mode, C < 100pF B High-Speed Mode, C < 400pF ...
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... REPEATED START = MCS Current Source Pull- Resistor Pull-up P Note A: First rising edge of SCLH after Repeated Start and after each ACK bit. Figure 6. I © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Conditions Standard Mode Fast Mode High-Speed Mode, C < 100pF B High-Speed Mode, C < ...
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... V BAT Load Current (mA) Figure 9. Charger Efficiency Figure 11. Auto-Charge Startup =100mA, OTG=1, V INLIM © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =4.2V, V =5.0V, and T OREG BUS 900 800 700 600 500 400 300 200 100 4 4 ...
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... Figure 13. AutoCharge Startup with 300mA Limited Charger / Adaptor, I =500mA, OTG=1, V INLIM Figure 15. Battery Removal / Insertion during Charging, V =3.9V, I =950mA BAT OCHARGE © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =4.2V, V =5.0V, and T =25°C. OREG BUS A Figure 14. Charger Startup with HZ_MODE Bit Reset, =3.4V ...
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... Charge Mode Typical Characteristics Unless otherwise specified, circuit of Figure 1, V Figure 17. No Battery at V Power-up; FAN5400, FAN5403 Figure 18. No Battery at V BUS 200 150 -30C +25C +85C 100 50 0 4.0 4.5 5.0 Input Voltage, V BUS Figure 19. VBUS Current in High-Impedance Mode with Battery Open © 2009 Fairchild Semiconductor Corporation FAN5400 Family • ...
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... V Load Current (mA) BUS Figure 23. Output Regulation vs. V 250 200 150 100 50 2 2.5 3 3.5 Battery Voltage, V Figure 25. Quiescent Current © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =3.6V, T =25°C. BAT A 100 2.7VBAT 80 3.6VBAT 4.2VBAT 75 200 250 300 0 BAT 5 ...
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... Unless otherwise specified, using circuit of Figure 1, V Figure 27. Boost PWM Waveform 100 150 V Load Current (mA) BUS Figure 29. Output Ripple vs. V © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =3.6V, T =25°C. BAT A Figure 28. Boost PFM Waveform 30 2.7VBAT 3.6VBAT 25 4.2VBAT 4.5VBAT ...
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... Boost Mode Typical Characteristics Unless otherwise specified, using circuit of Figure 1, V Figure 31. Startup, 3.6V , 44 Load, Additional 10µF, BAT X5R Across V Figure 33. Load Transient, 5-155-5mA, t © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 =3.6V, T =25°C. BAT A Figure 32. V BUS =t =100ns Figure 34. Load Transient, 5-255-5mA, t ...
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... Temperature: If the IC’s junction temperature reaches 120°C, charge current is continuously reduced until the IC’s temperature stabilizes at 120°C. In addition, the FAN5403-05 employ an additional loop to limit the amount of drop on VBUS to a programmable voltage ( accommodate “special chargers” that limit current lower current than might be available from a “ ...
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... Current as Function of I TERM TERM Resistor Values SENSE FAN5400 - FAN5402 FAN5403 - FAN5405 I (mA TERM RSENSE RSENSE (mV) (mV) 68m 100m 3 3.3 6.8 100 68 6.6 10.2 150 102 9.9 13.6 200 136 13.2 17.0 250 170 16 ...
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... RCH t ensures that unfiltered 50/60hz chargers and VBUS_VALID other non-compliant chargers are rejected. © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 USB-Friendly Boot Sequence For all versions except FAN5401, FAN5404 At VBUS POR, when the battery voltage is above the weak battery threshold (V ...
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... Flow Charts © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Figure 37. Charger VBUS POR 20 www.fairchildsemi.com ...
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... Indicate Charging NO Disable Charging Timeout? Indicate VBUS Fault I OUT NO Termination enabled V BAT Stop Charging Enable IDET for T © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Disable Charging Indicate VBUS Fault Enable I , SHORT Reset Safety reg Indicate Charging T 15MIN YES NO HIGHZ mode < ...
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... Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Figure 39. Charge Configuration Figure 40. HZ-State 22 www.fairchildsemi.com ...
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... Charge Start Start T 15MIN T 15MIN Active? Figure 41. Timer Flow Chart for FAN5400, FAN5402, FAN5403, FAN5405 Reset T 32SEC YES Figure 42. Timer Flow Chart for FAN5401, FAN5404 © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Reset Registers NO Start T 32SEC YES Stop T 15MIN ...
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... Safety Settings FAN5403-FAN5405 Only The FAN5403-05 contain a SAFETY register (REG6) that prevents the values in OREG (REG2[7:2]) and IOCHARGE (REG4[6:4]) from exceeding the values of the VSAFE and ISAFE values. After V exceeds V , the SAFETY register is loaded BAT SHORT with its default value and may be written only before any other register is written ...
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... SHORT V > V BAT SHORT Battery Detection During Power-up For FAN5400 and FAN5403 BUS At VBUS POR, a 5K load is applied to VBAT for 500ms to discharge any residual system capacitance in case the battery is absent commences. When V proceeds with the float voltage (OREG) temporarily set to 4V ...
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... STAT Pin CE bits were set when the RESET bit is set, these bits are OPEN also cleared, but the t OPEN remains in High-Impedance Mode. LOW 128s Pulse, Table 14. FAN5403–FAN5405 DISABLE Pin and then OPEN CE Bit Functionality Charging ENABLE DISABLE DISABLE DISABLE Raising the DISABLE pin stops t does not reset it ...
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... Figure 33 and Figure 43. 350 325 300 275 250 225 200 2.0 2.5 3.0 3.5 Battery Voltage, V BAT Figure 43. Output Resistance (R © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0 function of I BUS regulator is in PWM Mode (continuous conduction) as: V OUT At V =3.3V, and I BAT V OUT At V =2.7V, and I ...
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... PMID. The maximum voltage on V OUT this node is 5.9V. and is a FAN5403-FAN5405 provide a 1.8V regulated output on this BAT pin, which can be disabled through I OFF(MIN) DIS_VREG bit (REG5[6]). VREG can supply up to 2mA. This circuit, which is powered from PMID, is enabled only when PMID > ...
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... Charging Current Controlled by 3 ICHG I Control Loop CHARGE 2 IBUS I Limiting Charging Current BUS 1 VBUS_VALID V Not Valid BUS 0 CV Constant Current Charging © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 STATE 0 < – V ITERM CSIN BAT < 1mV V – V CSIN BAT V > V BAT SHORT V > ...
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... Slave Address HD;STA SDA SCL Figure 46. Start Bit A transaction ends with a STOP condition, which is defined as SDA transitioning from with SCL HIGH, as shown in Figure 47. © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 2 Mode I C-Bus® SDA SCL During a read from the FAN540X (Figure 50), the master ...
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... Bus control is signified by the shading of the packet, Master Drives Bus defined as and All addresses and data 7 bits S Slave Address 7 bits S Slave Address 0 © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 Table 21. Bit Definitions for Figure 49, Figure 50 Symbol Slave Drives Bus . S are MSB first bits ...
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... Register Descriptions The FAN5400-FAN5402 have seven user-accessible registers; the FAN5403-05 have an additional two registers, as defined in Table 22. 2 Table 22 Register Address IC ALL FAN5403-FAN5405 ALL Table 23. Register Bit Definitions This table defines the operation of each register bit for all IC versions. Default values are in bold text. ...
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... OTG pin active LOW OTG pin active HIGH Disables OTG pin Enables OTG pin Register Address Identifies Fairchild Semiconductor as the IC supplier R Part number bits, see the Ordering Info on page Revision, revision 1.X, where X is the decimal of these three bits Register Address: 04 ...
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... Table 23. Register Bit Definitions SP_CHARGER (FAN5403 – FAN5405) 7 Reserved 0 R DIS_VREG 1 0 R/W 5 IO_LEVEL EN_LEVEL 1 2:0 VSP Table 8 R/W SAFETY (FAN5403 – FAN5405) 7 Reserved 0 6:4 ISAFE Table 9 R/W 3:0 VSAFE Table 10 R/W MONITOR 7 ITERM_CMP 6 VBAT_CMP 5 LINCHG 4 T_120 See 3 ICHG Table 19 2 IBUS 1 VBUS_VALID 0 CV © 2009 Fairchild Semiconductor Corporation FAN5400 Family • ...
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... In particular, the total loop length for CMID should be minimized to reduce overshoot and ringing on the SW, PMID, and VBUS pins. All power and ground pins must be © 2009 Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 routed to their bypass capacitors using top copper if possible ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...
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... Fairchild Semiconductor Corporation FAN5400 Family • Rev. 1.0.7 37 www.fairchildsemi.com ...