PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 14

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PIC16C926-I/CL

Manufacturer Part Number
PIC16C926-I/CL
Description
64/68-Pin CMOS Microcontrollers with LCD Driver
Manufacturer
Microchip Technology
Datasheet
PIC16C925/926
2.2
The data memory is partitioned into four banks which
contain the General Purpose Registers and the Special
Function Registers. Bits RP1 and RP0 are the bank
select bits.
The lower locations of each Bank are reserved for the
Special Function Registers. Above the Special Func-
tion Registers are General Purpose Registers imple-
mented as static RAM. All four banks contain special
function registers. Some “high use” special function
registers are mirrored in other banks for code reduction
and quicker access.
DS39544A-page 12
(STATUS<6:5>)
RP1:RP0
Data Memory Organization
11
10
01
00
3 (180h-1FFh)
2 (100h-17Fh)
1 (80h-FFh)
0 (00h-7Fh)
Bank
Preliminary
2.2.1
The register file can be accessed either directly, or indi-
rectly
(Section 2.6).
The following General Purpose Registers are not phys-
ically implemented:
• F0h-FFh of Bank 1
• 170h-17Fh of Bank 2
• 1F0h-1FFh of Bank 3
These locations are used for common access across
banks.
through
GENERAL PURPOSE REGISTER
FILE
the
File
2001 Microchip Technology Inc.
Select
Register
FSR

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