PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 27

• Manufacturer Part Number: PIC16C926-I/CL
• Description: 64/68-Pin CMOS Microcontrollers with LCD Driver
• Manufacturer: Microchip Technology

2.4
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The upper bits (PC<12:8>) are not
readable, but are indirectly writable through the
PCLATH register. On any RESET, the upper bits of the
PC will be cleared. Figure 2-5 shows the two situations
for the loading of the PC. The upper example in the fig-
ure shows how the PC is loaded on a write to PCL
(PCLATH<4:0>
ure shows how the PC is loaded during a CALL or GOTO
instruction (PCLATH<4:3>
FIGURE 2-5:
2.4.1
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL). When doing a
table read using a computed GOTO method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
application note “Implementing a Table Read” (AN556).
2.4.2
The PIC16CXXX family has an 8-level deep x 13-bit
wide hardware stack. The stack space is not part of
either program or data space and the stack pointer is not
readable or writable. The PC is PUSHed onto the stack
when a CALL instruction is executed, or an interrupt
causes a branch. The stack is POPed in the event of a
RETURN, RETLW or a RETFIE instruction execution.
PCLATH is not affected by a PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
PC
PC
2001 Microchip Technology Inc.
12
12 11 10
2
PCL and PCLATH
5
PCH
PCLATH<4:3>
PCH
COMPUTED GOTO
STACK
PCLATH
PCLATH<4:0>
8
PCLATH
8
PCH). The lower example in the fig-
7
7
LOADING OF PC IN
DIFFERENT SITUATIONS
PCL
PCL
PCH).
11
8
0
0
Instruction with
PCL as
Destination
ALU Result
GOTO, CALL
Opcode <10:0>
Preliminary
2.5
PIC16C925/926 devices are capable of addressing a
continuous 8K word block of program memory. The
CALL and GOTO instructions provide only 11-bits of
address to allow branching within any 2K program
memory page. When doing a CALL or GOTO instruction,
the upper 2-bits of the address are provided by
PCLATH<4:3>. When doing a CALL or GOTO instruc-
tion, the user must ensure that the page select bits are
programmed so that the desired program memory
page is addressed. If a return from a CALL instruction
(or interrupt) is executed, the entire 13-bit PC is pushed
onto the stack. Therefore, manipulation of the
PCLATH<4:3> bits is not required for the RETURN
instructions (which POPs the address from the stack).
Example 2-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that PCLATH is saved and restored by the Interrupt
Service Routine (if interrupts are used).
EXAMPLE 2-1:
ORG 0x500
BCF
BSF
CALL
ORG 0x900
SUB1_P1:
RETURN
Note:
Note 1: There are no status bits to indicate stack
Program Memory Paging
2: There are no instructions/mnemonics
PCLATH,4
PCLATH,3
SUB1_P1
:
:
:
:
:
The contents of the PCLATH register are
unchanged after a RETURN or RETFIE
instruction is executed. The user must
rewrite the PCLATH for any subsequent
CALL or GOTO instructions.
overflow or stack underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the
CALL, RETURN, RETLW, and RETFIE
instructions, or the vectoring to an
interrupt address.
PIC16C925/926
;Select page 1 (800h-FFFh)
;Call subroutine in
;page 1 (800h-FFFh)
;called subroutine
;page 1 (800h-FFFh)
;return to Call subroutine
;in page 0 (000h-7FFh)
CALL OF A SUBROUTINE
IN PAGE 1 FROM PAGE 0
DS39544A-page 25