PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 45

• Manufacturer Part Number: PIC16C926-I/CL
• Description: 64/68-Pin CMOS Microcontrollers with LCD Driver
• Manufacturer: Microchip Technology

5.2
When an external clock input is used for Timer0, it must
meet certain requirements. The requirements ensure
the external clock can be synchronized with the internal
phase clock (T
incrementing of Timer0 after synchronization.
5.2.1
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI with the internal phase clocks is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks (Figure 5-5).
Therefore, it is necessary for T0CKI to be high for at
least 2T
at least 2T
to the electrical specification of the desired device.
FIGURE 5-5:
2001 Microchip Technology Inc.
Note 1: Delay from clock input change to Timer0 increment is 3T
OSC
External Clock/Prescaler
Output after sampling
External Clock Input or
Prescaler Output
Using Timer0 with an External
Clock
2: External clock if no prescaler selected, prescaler output otherwise.
3: The arrows indicate the points in time where sampling occurs.
OSC
Increment Timer0 (Q4)
EXTERNAL CLOCK
SYNCHRONIZATION
(and a small RC delay of 20 ns) and low for
in measuring the interval between two edges on Timer0 input = 4T
OSC
(and a small RC delay of 20 ns). Refer
). Also, there is a delay in the actual
TIMER0 TIMING WITH EXTERNAL CLOCK
(2)
Timer0
Q1 Q2 Q3 Q4
(3)
(1)
Preliminary
Q1 Q2 Q3 Q4
T0
OSC
When a prescaler is used, the external clock input is
divided by the asynchronous ripple counter type pres-
caler, so that the prescaler output is symmetrical. For
the external clock to meet the sampling requirement,
the ripple counter must be taken into account. There-
fore, it is necessary for T0CKI to have a period of at
least 4T
the prescaler value. The only requirement on T0CKI
high and low time is that they do not violate the mini-
mum pulse width requirement of 10 ns. Refer to param-
eters 40, 41 and 42 in the electrical specification of the
desired device.
5.2.2
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time the Timer0 mod-
ule is actually incremented. Figure 5-5 shows the delay
from the external clock edge to the timer incrementing.
to 7T
OSC
Q1 Q2 Q3 Q4
OSC
T0 + 1
OSC
. (Duration of Q = T
TMR0 INCREMENT DELAY
(and a small RC delay of 40 ns) divided by
max.
PIC16C925/926
Q1 Q2 Q3 Q4
OSC
T0 + 2
.) Therefore, the error
Small pulse
misses sampling
DS39544A-page 43