PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 80

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PIC16C926-I/CL

Manufacturer Part Number
PIC16C926-I/CL
Description
64/68-Pin CMOS Microcontrollers with LCD Driver
Manufacturer
Microchip Technology
Datasheet
PIC16C925/926
10.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 10-2. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
mended impedance for analog sources is 10 k . As
the impedance is decreased, the acquisition time may
EQUATION 10-1:
FIGURE 10-2:
DS39544A-page 78
T
T
DD
Note 1: The reference voltage (V
ACQ
T
ACQ
C
), see Figure 10-2. The maximum recom-
A/D Acquisition Requirements
=
=
=
=
=
=
=
=
SS
2: The charge holding capacitor (C
3: The maximum recommended impedance for analog sources is 10 k . This is required to meet the pin leak-
4: After a conversion has completed, a 2.0T
SS
) impedance varies over the device voltage
age specification.
During this time, the holding capacitor is not connected to the selected A/D input channel.
) impedance directly affect the time
Amplifier Settling Time +
Hold Capacitor Charging Time +
Temperature Coefficient
T
2 S + T
C
- 120pF (1k + 7k + 10k ) In(0.0004885)
16.47 S
2 S + 16.47 S + [(50°C -25 C)(0.05 S/ C)
19.72 S
AMP
HOLD
Legend C
+ T
(R
C
VA
C
ACQUISITION TIME EXAMPLE
+ [(Temperature -25°C)(0.05 S/°C)]
ANALOG INPUT MODEL
IC
S
+ T
V
I
R
SS
C
) and the internal sampling
R
+ R
LEAKAGE
PIN
T
IC
HOLD
S
COFF
SS
ANx
+ R
C
5 pF
HOLD
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
HOLD
S
) In(1/2047)
various junctions
) must be allowed
REF
. The sampling
) has no effect on the equation, since it cancels itself out.
HOLD
V
DD
V
V
) is not discharged after each conversion.
T
T
Preliminary
= 0.6V
= 0.6V
AD
delay must complete before acquisition can begin again.
I
± 500 nA
LEAKAGE
be decreased. After the analog input channel is
selected (changed), this acquisition must be done
before the conversion can be started.
To
Equation 10-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
To calculate the minimum acquisition time, T
the
(DS33023).
R
IC
calculate
PICmicro™
1k
V
SS R
DD
Sampling
Switch
6V
5V
4V
3V
2V
SS
the
Mid-Range
Sampling Switch
5 6 7 8 9 10 11
V
minimum
C
= DAC Capacitance
= 120 pF
SS
(k )
HOLD
2001 Microchip Technology Inc.
Reference
acquisition
ACQ
Manual
, see
time,

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