CD4029BCN Fairchild Semiconductor, CD4029BCN Datasheet
CD4029BCN
Specifications of CD4029BCN
4029B
CD4029
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CD4029BCN Summary of contents
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... M16B 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide CD4029BCSJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide CD4029BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Connection Diagram © 2004 Fairchild Semiconductor Corporation Features Wide supply voltage range: High noise immunity: 0 ...
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Logic Diagram www.fairchildsemi.com 2 ...
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Absolute Maximum Ratings (Note 2) DC Supply Voltage ( Input Voltage ( Storage Temperature Range ( Power Dissipation ( Dual-In-Line Small Outline Lead Temperature ( (Soldering, 10 ...
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AC Electrical Characteristics pF, R 200k, Input rCL Symbol Parameter CLOCKED OPERATION Propagation Delay Time PHL PLH to Q Outputs Propagation Delay Time PHL PLH ...
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Logic Waveforms Decade Mode Binary Mode 5 www.fairchildsemi.com ...
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Switching Time Waveforms Cascading Packages Carry out lines at the 2nd or later stages may have a negative-going spike due to differential internal delays. These spikes do not affect counter operation, but if the carry out is used to trigger ...
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Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Intergrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M16B 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M16D 8 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...