UPD753012GC NEC, UPD753012GC Datasheet - Page 16

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UPD753012GC

Manufacturer Part Number
UPD753012GC
Description
4-BIT SINGLE-CHIP MICROCONTROLLER
Manufacturer
NEC
Datasheets
4.2 Setting Method of Stack Bank Select Register (SBS)
initialized to 10XXB
16
Switching between the Mk I mode and Mk II mode can be done by the SBS. Figure 4-1 shows the format.
The SBS is set by a 4-bit memory manipulation instruction. When using the Mk I mode, the SBS must be
Note The desired numbers must be set in the XX positions.
Caution Since SBS. 3 is set to “1” after a RESET signal is generated, the CPU operates in the Mk
Address
I mode. When executing an instruction in the Mk II mode, set SBS. 3 to “0” to select the
Mk II mode.
F84H
Note
at the beginning of a program. When using the Mk II mode, it must be initialized to 00XXB
SBS3 SBS2 SBS1
3
Figure 4-1. Stack Bank Select Register Format
2
1
SBS0
0
Symbol
SBS
Stack area specification
Mode switching specification
0
0
1
1
0
0
1
0 must be set in the bit 2 position.
Mk II mode
Mk I mode
0
1
0
1
Memory bank 0
Memory bank 1
Memory bank 2
Memory bank 3
PD753012, 753016, 753017
Note
.

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