UPD753012GC NEC, UPD753012GC Datasheet - Page 17

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UPD753012GC

Manufacturer Part Number
UPD753012GC
Description
4-BIT SINGLE-CHIP MICROCONTROLLER
Manufacturer
NEC
Datasheets
5. MEMORY CONFIGURATION
Note Can be used in Mk II mode only.
Remark In addition to the above, a branch can be taken to the address indicated by changing only the low-order
000AH
000CH
07FFH
0FFFH
1FFFH
2FFFH
007FH
0000H
0002H
0004H
0006H
0008H
0020H
0080H
0800H
1000H
2000H
• Program memory (ROM)
• Data memory (RAM)
·
·
Data area …1024 words
Peripheral hardware area…128
MBE
MBE
MBE
MBE
MBE
MBE
MBE
7
eight bits of PC by executing the BR PCDE, BR PCXA instruction.
RBE
RBE
RBE
RBE
RBE
RBE
RBE
6
GETI instruction reference table
INTBT/INT4 start address
INTBT/INT4 start address
INT0 start address
INT0 start address
INT1 start address
INT1 start address
INTCSI start address
INTCSI start address
INTT0 start address
INTT0 start address
INTT1, INTT2 start address
INTT1, INTT2 start address
Internal reset start address (high-order 6 bits)
Internal reset start address
5
............... 12288
............... 16384
............... 24576
Figure 5-1. Program Memory Map (1/3)
4 bits (000H to 3FFH)
4 bits (F80H to FFFH)
(Iow-order 8 bits)
(high-order 6 bits)
(Iow-order 8 bits)
(Iow-order 8 bits)
(high-order 6 bits)
(Iow-order 8 bits)
(high-order 6 bits)
(Iow-order 8 bits)
(high-order 6 bits)
(Iow-order 8 bits)
(high-order 6 bits)
(Iow-order 8 bits)
(high-order 6 bits)
(a)
8 bits ( PD753012)
8 bits ( PD753016)
8 bits ( PD753017)
PD753012
0
CALLF !faddr
entry address
instruction
BRCB !caddr instruction
BRCB !caddr instruction
PD753012, 753016, 753017
branch address
branch address
branch address
BRCB !caddr
instruction
Branch address of
BR BCXA, BR BCDE,
BR !addr1, BRA !addr1
or CALLA !addr1
instruction
CALL !addr instruction
subroutine entry address
BR $addr instruction
relative branch address
(–15 to –1, +2 to +16)
Note
Branch destination
address and
subroutine entry
address when GETI
instruction is executed
Note
17

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