UPD753012GC NEC, UPD753012GC Datasheet - Page 48

• Manufacturer Part Number: UPD753012GC
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER
• Manufacturer: NEC

Notes 1.
Remark PC
48
Instruction
Table
Bit transfer
Operation
Group
2.
The above operations in the shaded boxes can be performed only in the Mk II mode. The other
operations can be performed only in the Mk I mode.
Only the following bits are valid for the B register.
MOVT
MOV1
ADDS
ADDC
SUBS
SUBC
Mnemonic
PD753012, 753016 : low-order 2 bits
PD753017
14
is fixed to 0 when the PD753017 is set in the Mk I mode.
Note 1
XA, @PCDE
XA, @PCXA
XA, @BCDE
XA, @BCXA
CY, fmem.bit
CY, pmem.@L
CY, @H+mem.bit
fmem.bit, CY
pmem.@L, CY
@H+mem.bit, CY
A, #n4
XA, #n8
A, @HL
XA, rp’
rp’1, XA
A, @HL
XA, rp’
rp’1, XA
A, @HL
XA, rp’
rp’1, XA
A, @HL
XA, rp’
rp’1, XA
Operand
Note 2
Note 2
: low-order 3 bits
Number
of Bytes
1
1
1
1
2
2
2
2
2
2
1
2
1
2
2
1
2
2
1
2
2
1
2
2
of Machine
Number
Cycles
1+S
2+S
1+S
2+S
2+S
1+S
2+S
2+S
3
3
3
3
2
2
2
2
2
2
1
2
2
1
2
2
XA
•
XA
XA
•
XA
XA
•
XA
XA
•
XA
CY
CY
CY
(fmem.bit)
(pmem
(H+mem
A
XA
A
XA
rp’1
A, CY
XA, CY
rp’1, CY
A
XA
rp’1
A, CY
XA, CY
rp’1, CY
PD753017
PD753017
PD753017
PD753017
A+n4
A+(HL)
A–(HL)
(PC
(PC
(PC
(PC
(B
(B
(B
(B
(fmem.bit)
(pmem
(H+mem
XA+n8
XA+rp’
XA–rp’
7–2
rp’1+XA
rp’1–XA
3–0
1,0
2–0
1,0
2–0
+L
A+(HL)+CY
A–(HL)–CY
13–8
14–8
13–8
14–8
+CDE)
+CXA)
+CDE)
+CXA)
.bit)
XA+rp’+CY
XA–rp’–CY
3–2
rp’1+XA+CY
rp’1–XA–CY
+DE)
+DE)
+XA)
+XA)
7–2
CY
.bit(L
3–0
+L
Operation
ROM
ROM
ROM
.bit)
ROM
CY
ROM
ROM
ROM
ROM
3–2
1–0
.bit(L
))
1–0
CY
PD753012, 753016, 753017
))
Addressing
Area
*11
*11
*6
*6
*4
*5
*1
*4
*5
*1
*1
*1
*1
*1
carry
carry
carry
carry
carry
borrow
borrow
borrow
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