UPD753012GC NEC, UPD753012GC Datasheet - Page 54

• Manufacturer Part Number: UPD753012GC
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER
• Manufacturer: NEC

Notes 1.
Remark PC
54
Instruction
Subroutine
stack control
instructions
Interrupt
control
instructions
Input/output
instructions
CPU control
instruction
Special
instruction
Group
2.
3.
While the IN instruction and OUT instruction are being executed, the MBE must be set to 0 or 1 and
MBS must be set to 15.
The shaded area is applicable only to the Mk II mode. The other area is applicable only to Mk I mode.
The TBR and TCALL instructions are the table definition assembler pseudo instructions of the GETI
instruction.
PUSH
POP
EI
DI
IN
OUT
HALT
STOP
NOP
SEL
GETI
Mnemonic
14
Note 1
is fixed to 0 when the PD753017 is set in the Mk I mode.
Note 1
Notes 2, 3
rp
BS
rp
BS
IEXXX
IEXXX
A, PORTn
XA, PORTn
PORTn, A
PORTn, XA
RBn
MBn
taddr
Operand
Number
of Bytes
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
2
2
1
1
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
of Machine
Number
Cycles
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
2
2
3
3
4
3
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
(SP–1)(SP–2)
(SP–1)
rp
MBS
IME(IPS.3)
IEXXX
IME(IPS.3)
IEXXX
A
XA
PORTn
PORTn+1, PORTn
Set HALT mode (PCC.2
Set STOP mode (PCC.3
No operation
RBS
MBS
• When TBR instruction
• When TCALL instruction
• When instruction other than TBR and
•
• When TBR instruction
• When TCALL instruction
• When instruction other than TBR and
PC
(SP–4)(SP–1)(SP–2)
(SP–3)
PC
SP
TCALL instructions
(taddr) (taddr+1) instruction is executed
PC
PC
(SP–5)(SP–6)(SP–3)(SP–4)
(SP–2)
PC
SP
TCALL instructions
(taddr) (taddr+1) instruction is executed
PD753017
PORTn
13–0
13–0
13–0
14
13–0
(SP+1)(SP), SP
PORTn+1, PORTn
n
(SP+1), RBS
n
SP–4
SP–6, PC
1
0
0
MBS, (SP–2)
A
(taddr)
(taddr)
(taddr)
(taddr)
MBE, RBE, PC
, , MBE, RBE
1
0
(n = 0-3)
(n = 0-3, 15)
Operation
rp, SP
5–0
5–0
5–0
5–0
14
+(taddr+1)
+(taddr+1)
+(taddr+1)
+(taddr+1)
XA
0
SP+2
(SP), SP
PC
PD753012, 753016, 753017
RBS, SP
SP–2
1)
13
1)
, PC
11–0
(n = 0-7)
(n = 4, 6)
(n = 2-7)
(n = 4, 6)
12
0, PC
SP+2
14–0
SP–2
Addressing
Area
*10
– – – – – – – – – – – –
– – – – – – – – – – – –
– – – – – – – – – – – –
– – – – – – – – – – – – –
Depending on
the reference
instruction
Depending on
the reference
instruction
Skip Condition