UPD753012GC NEC, UPD753012GC Datasheet - Page 67

• Manufacturer Part Number: UPD753012GC
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER
• Manufacturer: NEC

Data retention characteristics of data memory in STOP mode and at low supply voltage
(T
Notes 1.
Data retention timing (when STOP mode released by RESET)
Data retention timing (standby release signal: when STOP mode released by interrupt signal)
Release signal setup time
Oscillation stabilization
wait time
RESET
Standby release signal
A
= –40 to +85 ˚C)
(interrupt request)
V
V
DD
DD
2.
3.
Parameter
Note 1
STOP instruction execution
STOP instruction execution
The oscillation stabilization wait time is the time during which the CPU stops operating to prevent
unstable operation when oscillation is started.
Either 2
Set by the basic interval timer mode register (BTM). (Refer to the table below.)
BTM3
–
–
–
–
17
/f
X
BTM2
or 2
0
0
1
1
15
/f
t
t
SREL
WAIT
X
BTM1
Symbol
can be selected by mask option.
0
1
0
1
BTM0
0
1
1
1
Released by RESET
Released by interrupt request
Data retention mode
V
Data retention mode
STOP mode
STOP mode
DDDR
2
2
2
2
20
17
15
13
/f
/f
/f
/f
x
x
x
x
(approx. 250 ms)
(approx. 31.3 ms)
(approx. 7.82 ms)
(approx. 1.95 ms)
f
x
Conditions
= 4.19 MHz
Wait Time
PD753012, 753016, 753017
Internal reset operation
2
2
2
2
t
t
SREL
SREL
20
17
15
13
/f
/f
/f
/f
x
x
x
x
MIN.
(approx. 175 ms)
(approx. 21.8 ms)
(approx. 5.46 ms)
(approx. 1.37 ms)
f
x
0
= 6.0 MHz
Oscillation stabilization wait time
Oscillation stabilization wait time
t
t
WAIT
WAIT
Note 2
Note 3
TYP.
MAX.
Operation mode
Operation mode
Unit
ms
ms
s
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