FQU3P50 Fairchild Semiconductor, FQU3P50 Datasheet

no-image

FQU3P50

Manufacturer Part Number
FQU3P50
Description
500V P-Channel MOSFET
Manufacturer
Fairchild Semiconductor
Datasheet
string(70) "Class: /home/ecomp/master.elcodis.git/htdocs/inc/../Doc.php not found!" string(70) "Class: /home/ecomp/master.elcodis.git/htdocs/inc/../Doc.php not found!" string(70) "Class: /home/ecomp/master.elcodis.git/htdocs/inc/../Doc.php not found!" string(70) "Class: /home/ecomp/master.elcodis.git/htdocs/inc/../Doc.php not found!"
©2000 Fairchild Semiconductor International
FQD3P50 / FQU3P50
500V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic lamp ballast based on complimentary
half bridge.
Absolute Maximum Ratings
Thermal Characteristics
* When mounted on the minimum pad size recommended (PCB Mount)
V
I
I
V
E
I
E
dv/dt
P
T
T
R
R
R
D
DM
AR
J
L
Symbol
DSS
GSS
AS
AR
D
Symbol
, T
JC
JA
JA
STG
G
Drain-Source Voltage
Drain Current
Drain Current
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
Power Dissipation (T
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
S
FQD Series
D-PAK
D
- Continuous (T
- Continuous (T
- Pulsed
- Derate above 25°C
A
C
= 25°C) *
Parameter
= 25°C)
Parameter
G
T
D
C
C
C
= 25°C unless otherwise noted
S
= 25°C)
= 100°C)
(Note 1)
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Features
• -2.1A, -500V, R
• Low gate charge ( typical 18 nC)
• Low Crss ( typical 9.5 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
FQU Series
I-PAK
FQD3P50 / FQU3P50
Typ
--
--
--
DS(on)
-55 to +150
= 4.9
-1.33
-500
-2.1
-8.4
250
-2.1
-4.5
300
5.0
2.5
0.4
50
30
G
@V
! ! ! !
! ! ! !
Max
110
2.5
50
GS
QFET
QFET
QFET
QFET
= -10 V
▶ ▶ ▶ ▶
▶ ▶ ▶ ▶
! ! ! !
! ! ! !
D
S
! ! ! !
! ! ! !
● ●
● ●
● ●
● ●
● ●
● ●
August 2000
▲ ▲ ▲ ▲
▲ ▲ ▲ ▲
Rev. A, August 2000
Units
W/°C
Units
°C/W
°C/W
°C/W
V/ns
mJ
mJ
°C
°C
W
W
V
A
A
A
V
A
TM

Related parts for FQU3P50

FQU3P50 Summary of contents

Page 1

... D FQD3P50 / FQU3P50 Units -500 V -2.1 A -1. 250 mJ -2.1 A 5.0 mJ -4.5 V/ns 2 ...

Page 2

... ≤ -2.7A, di/dt ≤ 200A ≤ DSS, 4. Pulse Test : Pulse width ≤ 300 s, Duty cycle ≤ Essentially independent of operating temperature ©2000 Fairchild Semiconductor International T = 25°C unless otherwise noted C Test Conditions -250 -250 A, Referenced to 25°C ...

Page 3

... Drain Current and Gate Voltage 1200 1000 800 600 400 200 Drain-Source Voltage [V] DS Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor International 0 10 ※ Notes : 1. 250μ s Pulse Test 25℃ Figure 2. Transfer Characteristics 0 10 ※ Note : T = 25℃ ...

Page 4

... Drain-Source Voltage [V] DS Figure 9. Maximum Safe Operating Area ©2000 Fairchild Semiconductor International (Continued) 2.5 2.0 1.5 1.0 ※ Notes : 0 -250 μ 0.0 100 150 200 -100 o C] Figure 8 ...

Page 5

... Unclamped Inductive Switching Test Circuit & Waveforms -10V -10V ©2000 Fairchild Semiconductor International Gate Charge Test Circuit & Waveform Same Type Same Type as DUT as DUT -10V -10V DUT DUT ...

Page 6

... Peak Diode Recovery dv/dt Test Circuit & Waveforms Driver ) ( Driver ) DUT ) ( DUT ) DUT ) ( DUT ) ©2000 Fairchild Semiconductor International + + DUT DUT Driver Driver Compliment of DUT Compliment of DUT ...

Page 7

... Package Dimensions 6.60 5.34 (0.50) (4.34) MAX0.96 2.30TYP [2.30 0.20] ©2000 Fairchild Semiconductor International DPAK 0.20 0.30 (0.50) 0.76 0.10 2.30TYP [2.30 0.20] 2.30 0.10 0.50 0.10 0.50 0.10 1.02 0.20 2.30 0.20 6.60 0.20 (5.34) (5.04) (1.50) (2XR0.25) 0.76 0.10 Rev. A, August 2000 ...

Page 8

... Package Dimensions (Continued) 6.60 0.20 5.34 0.20 (0.50) (4.34) MAX0.96 0.76 0.10 2.30TYP [2.30 0.20] ©2000 Fairchild Semiconductor International IPAK (0.50) 2.30TYP [2.30 0.20] 2.30 0.20 0.50 0.10 0.50 0.10 Rev. A, August 2000 ...

Page 9

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ CMOS™ FACT™ FACT Quiet Series™ ® ...

Related keywords