MT28F004B3VG-10TET Micron, MT28F004B3VG-10TET Datasheet - Page 15

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MT28F004B3VG-10TET

Manufacturer Part Number
MT28F004B3VG-10TET
Description
4Mb SMART 3 BOOT BLOCK FLASH MEMORY
Manufacturer
Micron
Datasheet
NOTE: 1. Sequence may be repeated for additional BYTE or WORD WRITEs.
4Mb Smart 3 Boot Block Flash Memory
F45_2.p65 – Rev. 2, Pub. 3/01
SELF-TIMED WRITE SEQUENCE
2. Complete status check is not required. However, if SR3 = 1, further WRITEs are inhibited until the status register is
3. Device will be in status register read mode. To return to the array read mode, the FFh command must be issued.
4. If SR3 is set during a WRITE or BLOCK ERASE attempt, CLEAR STATUS REGISTER must be issued before further WRITE
5. Status register bits 3-5 must be cleared using CLEAR STATUS REGISTER.
cleared.
or ERASE operations are allowed by the CEL.
(WORD OR BYTE WRITE)
WRITE Word or Byte
WRITE 40h or 10h
STATUS REGISTER
WRITE Complete
Check (optional)
Complete Status
Address/Data
SR7 = 1?
V
READ
Start
PP
= 5V
YES
2
3
NO
1
SMART 3 BOOT BLOCK FLASH MEMORY
15
COMPLETE WRITE STATUS-CHECK
Start (WRITE completed)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WRITE Successful
SR3 = 0?
SR4 = 0?
YES
YES
SEQUENCE
NO
NO
V
BYTE/WORD WRITE Error
PP
Error
4, 5
©2001, Micron Technology, Inc.
4Mb
5

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