MT9085BPR Zarlink Semiconductor, Inc., MT9085BPR Datasheet - Page 10

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MT9085BPR

Manufacturer Part Number
MT9085BPR
Description
1024 Channels TDM (ST-BUS) to Parallel Bus Access Circuit (PAC)
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
MT9085B
In the example configuration shown in Figure 9 the
OE pin of PAC #2 is connected to D10 on the
Connection Memory. Setting bit 10 high in the
Connection Memory location corresponding to a
serial channel timeslot will result in the output driver
for the specific stream being disabled during that
serial channel timeslot. D11 is connected to the ME
input of SMX1 and D12 is connected to a mode
select pin (Mz). Consequently, the levels on these
outputs can be set high or low by writing to the
appropriate memory location corresponding to the
selected output channel. The mapping of the control
functions on to Connection Memory data bits is
illustrated in Figure 10.
The data on the PAC serial streams is byte
interleaved
Description section in this data sheet. The SMX
channel number corresponding to the channel on the
serial streams can be determined directly by
specifying the serial channel and stream number in
binary as shown in Figure 11. For example, serial
channel 4, stream 2 corresponds to SMX channel
2-134
S0
S31
OE CKD MCA MCB
S0
S31
2/4S
F0i
as
Source
Timing
C4i C16i
PAC#1
described
S/P
Figure 9 - 1024 Channel Switch Matrix Using the PAC and SMX
P0-P7
C16
DFPo
CFPo
+5
C4
in
F0
C16
the
8
C16
+5
Functional
CK
FP
D12
D0-D7i
CK
FP
Mz
R/W
ODE
MPU Interface
CONNECTION
SMX #2
CM - 1
MEMORY
DM - 1/2
SMX #1
MEMORY
D0-D9 D11
A0-A9 ME
DATA
10
number Hex 0082. In order to program the matrix for
switching, the input channel address is written to the
Connection Memory address corresponding to the
serial output channel. The bits controlling features
such as OE, ME, and Mz should be set or reset
accordingly at the same time. For example. if
channel 4 on stream 2 is to be switched to channel
10 on stream 1, the following binary word is written
to Connection Memory address corresponding to the
output channel (Hex 0141):
D0-D7o
ODE
D10
Mx
My
Mz
X X X 0
CS
DS
Mx
My
8
0 0 0 0
+5
+5
NOTE: Connect all inputs not shown to V
1 0 0 0
From Timing Source
F0 C4 C16
F0i C4i C16i
OE CKD MCA MCB
P0-P7
PAC#2
0 0 1 0
P/S
+5
2/4S
S31
S0
Stream Address
Channel Address
Output Enable
Message Enable
DM-1/DM-2
Unused
S0
S31
SS

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