MM74HCT74N Fairchild Semiconductor, MM74HCT74N Datasheet
MM74HCT74N
Specifications of MM74HCT74N
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MM74HCT74N Summary of contents
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... MM74HCT74M M14A MM74HCT74SJ M14D MM74HCT74MTC MTC14 MM74HCT74N N14A Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1984 Fairchild Semiconductor Corporation MM74HCT74 Rev. 1.4.0 General Description ...
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... Connection Diagram Pin Assignments for DIP, SOIC, SOP and TSSOP Logic Diagram ©1984 Fairchild Semiconductor Corporation MM74HCT74 Rev. 1.4.0 Truth Table Inputs PR CLR CLK the level of Q before the indicated input conditions were established. Note: 1. This configuration is nonstable; that is, it will not persist when preset and clear inputs return to their inactive (HIGH) level ...
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... Symbol V Supply Voltage Input or Output Voltage IN OUT T Operating Temperature Range Input Rise or Fall Times r f ©1984 Fairchild Semiconductor Corporation MM74HCT74 Rev. 1.4.0 (2) Parameter Parameter 3 Rating –0.5 to +7.0V –1 +1.5V CC –0 +0.5V CC ±20mA ±25mA ±50mA –65°C to +150°C ...
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... Maximum Propagation Delay from Preset or PHL PLH Clear Minimum Removal Time, Preset or Clear to REM Clock t Minimum Setup Time Data to Clock S t Minimum Hold Time Clock to Data H t Minimum Pulse Width Clock, Preset or Clear W ©1984 Fairchild Semiconductor Corporation MM74HCT74 Rev. 1.4.0 Conditions Typ 20µ OUT CC V ...
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... Maximum Output Rise and Fall THL TLH Time C Power Dissipation Capacitance PD C Maximum Input Capacitance IN Note determines the no load dynamic power consumption current consumption ©1984 Fairchild Semiconductor Corporation MM74HCT74 Rev. 1.4.0 t 6ns unless otherwise specified Conditions Typ. (5) (per flip-flop 25° ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...