isl6307b Intersil Corporation, isl6307b Datasheet - Page 28

• Manufacturer Part Number: isl6307b
• Description: 6-phase Vr11 Pwm Controller With 8-bit Vid Code Capable Of Precision Rds On Or Dcr Differential Current Sensing For Applications In Which Supply Voltage Is Higher Than 5v
• Manufacturer: Intersil Corporation

decrease in temperature rise in order to cause proportionally
less current to flow in the hotter phase.
In Equation 31, make sure that ∆T
rise above the ambient temperature, and ∆T
temperature rise above the ambient temperature. While a
single adjustment according to Equation 31 is usually
sufficient, it may occasionally be necessary to adjust R
two or more times to achieve optimal thermal balance
between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labeled R
Its value depends on the desired full-load droop voltage
(V
ISEN resistor, the load-line regulation resistor is as shown in
Equation 32.
If one or more of the ISEN resistors are adjusted for thermal
balance, as in Equation 31, the load-line regulation resistor
should be selected according to Equation 33 where I
full-load operating current and R
connected to the n
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING LOAD-LINE REGULATED CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
R
R
R
ISEN 2 ,
FB
FB
DROOP
=
=
V
------------------------ -
--------------------------------- -
I
50 10
FL
=
DROOP
V
×
DROOP
in Figure 8). If Equation 30 is used to select each
R
R
DS ON
ISEN
–
6
(
∆T
----------
∆T
)
th
∑
2
1
n
ISEN pin.
R
ISEN n ( )
28
C
and C
ISEN(n)
2
is the desired temperature
C
.
is the ISEN resistor
1
FB
is the measured
in Figure 8.
FL
(EQ. 33)
(EQ. 31)
(EQ. 32)
ISEN
is the
ISL6307B
The feedback resistor, R
outlined in Load-Line Regulation Resistor. Select a target
bandwidth for the compensated system, f
bandwidth must be large enough to assure adequate
transient performance, but smaller than 1/3 of the per-
channel switching frequency. The values of the
compensation components depend on the relationships of f
to the L-C pole frequency and the ESR zero frequency. For
each of the three cases which follow, there are a separate
set of equations for the compensation components.
Case 1:
Case 2:
Case 3:
FIGURE 20. COMPENSATION CONFIGURATION FOR
R
FB
LOAD-LINE REGULATED ISL6307B CIRCUIT
R
C
-------------------
2π LC
R
C
-------------------
2π LC
f
R
C
V
0
+
C
C
-
C
C
DROOP
C
C
R
>
1
1
C
=
=
=
=
=
=
----------------------------- -
2πC ESR
R
-------------------------------------------------------------- -
(
C
R
------------------------------------- -
2πV
R
0.75V
------------------------------------------------ -
FB
2π
2πV
2
>
≤
FB
FB
FB
(
C
(OPTIONAL)
f
1
f
0.75V
, has already been chosen as
)
0
C
0
P-P
2πf
-------------------------------------- -
V
----------------------------------------------
2
----------------------------------------- -
0.75 V
P-P
<
P-P
f
IN
0
----------------------------- -
2πC ESR
2π f
0.75V
2
0.75V
0
R
)
0.75 V
(
R
IN
V
IDROOP
V
ESR
FB
(
2π
P-P
P-P
FB
COMP
0
VDIFF
(
IN
1
V
f
0
)
f
IN
IN
P-P
2
0
FB
R
(
) C
IN
ESR
f
LC
FB
0
L
2
L
)
LC
0
)
. The target
LC
March 9, 2006
(EQ. 34)
FN9225.0
0