isl6307b Intersil Corporation, isl6307b Datasheet - Page 30

• Manufacturer Part Number: isl6307b
• Description: 6-phase Vr11 Pwm Controller With 8-bit Vid Code Capable Of Precision Rds On Or Dcr Differential Current Sensing For Applications In Which Supply Voltage Is Higher Than 5v
• Manufacturer: Intersil Corporation

voltage drop across the ESR increases linearly until the load
current reaches its final value. The capacitors selected must
have sufficiently low ESL and ESR so that the total output-
voltage deviation is less than the allowable maximum.
Neglecting the contribution of inductor current and regulator
response, the output voltage initially deviates by an amount
The filter capacitor must have sufficiently low ESL and ESR
so that ∆V < ∆V
Most capacitor solutions rely on a mixture of high-frequency
capacitors with relatively low capacitance in combination
with bulk capacitors having high capacitance but limited
high-frequency performance. Minimizing the ESL of the
high-frequency capacitors allows them to support the output
voltage as the current increases. Minimizing the ESR of the
bulk capacitors allows them to supply the increased current
with less output voltage deviation.
The ESR of the bulk capacitors also creates the majority of
the output-voltage ripple. As the bulk capacitors sink and
source the inductor ac ripple current (see Interleaving and
Equation 2), a voltage develops across the bulk-capacitor
ESR equal to I
are selected, the maximum allowable ripple voltage,
V
Since the capacitors are supplying a decreasing portion of
the load current while the regulator recovers from the
transient, the capacitor voltage becomes slightly depleted.
The output inductors must be capable of assuming the entire
load current before the output voltage decreases more than
∆V
Equation 38 gives the upper limit on L for the cases when
the trailing edge of the current transient causes a greater
output-voltage deviation than the leading edge. Equation 39
addresses the leading edge. Normally, the trailing edge
dictates the selection of L because duty cycles are usually
less than 50%. Nevertheless, both inequalities should be
evaluated, and L should be selected based on the lower of
the two results. In each equation, L is the per-channel
inductance, C is the total output capacitance, and N is the
number of active channels.
L
L
∆V
L
P-P(MAX)
≤
≤
≥
MAX
2NCV
-------------------- - ∆V
(
------------------------- - ∆V
≈
1.25
(
(
(
ESR
∆I
(
ESL
∆I
. This places an upper limit on inductance.
)
) NC
)
2
O
2
)
)
, determines the lower limit on the inductance.


----------------------------------------------------------- -
di
---- -
dt
V
IN
f
+
S
C,P-P
MAX
(
V
MAX
–
MAX
ESR
IN
N V
V
–
(ESR). Thus, once the output capacitors
.
P-P MAX
OUT
) ∆I
∆I ESR
–
∆I ESR
(
(
(
 V

OUT
)
)
30
)


V
IN
–
V
O


(EQ. 36)
(EQ. 37)
(EQ. 38)
(EQ. 39)
ISL6307B
Input Supply Voltage
The VCC input of SL6307B needs to be connected to +12V
through a 300Ω resistor with one 1µF cap be connected from
VCC to GND.
Switching Frequency
There are a number of variables to consider when choosing
the switching frequency, as there are considerable effects on
the upper-MOSFET loss calculation. These effects are
outlined in MOSFETs, and they establish the upper limit for
the switching frequency. The lower limit is established by the
requirement for fast transient response and small output-
voltage ripple as outlined in Output Filter Design. Choose the
lowest switching frequency that allows the regulator to meet
the transient-response requirements.
Switching frequency is determined by the selection of the
frequency-setting resistor, R
Typical Application on pages 4, 5, 6 and 7). Equation 40 is
provided to assist in selecting the correct value for R
R
Input Capacitor Selection
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper
MOSFETs. Their RMS current capacity must be sufficient to
handle the AC component of the current drawn by the upper
MOSFETs that is related to duty cycle and the number of
active phases.
T
FIGURE 22. NORMALIZED INPUT-CAPACITOR RMS CURRENT
=
0.3
0.2
0.1
0
2.5X10
------------------------- -
0
F
I
I
I
SW
L,P-P
L,P-P
L,P-P
10
vs DUTY CYCLE FOR 2-PHASE CONVERTER
= 0
= 0.5 I
= 0.75 I
0.2
O
O
DUTY CYCLE (V
0.4
T
(see the figures labeled
0.6
O
/V
IN
)
0.8
March 9, 2006
T
(EQ. 40)
.
FN9225.0
1.0