isl6312a Intersil Corporation, isl6312a Datasheet - Page 29

• Manufacturer Part Number: isl6312a
• Description: Four-phase Buck Pwm Controller With Integrated Mosfet Drivers For Intel Vr10, Vr11, And Amd Applications
• Manufacturer: Intersil Corporation

Loadline Regulation Resistor
For loadline regulation a copy of the internal average sense
current flows out of the FB pin across the loadline
regulation resistor, labeled R
value sets the desired loadline required for the application.
The desired loadline, R
equation where V
full load current I
Based on the desired loadline, the loadline regulation
resistor, R
Equation 41, depending on the R-C current sense circuitry
being employed. If a basic R-C sense circuit consisting of C
and R
R-C sense circuit consisting of R
use Equation 41.
In Equations 40 and 41, R
the number of active channels; DCR is the DCR of the
individual output inductors; and R
sense R-C resistors.
IOUT Pin Resistor
A copy of the average sense current flows out of the IOUT
pin, and a resistor, R
be used to set the overcurrent protection trip level. Based on
the desired overcurrent trip threshold, I
resistor, R
Equation 43, depending on the R-C current sense circuitry
being employed. If a basic R-C sense circuit consisting of C
R
R
R
LL
FB
FB
FIGURE 19. TIME CONSTANT MISMATCH BEHAVIOR
=
=
=
1
ΔV
V
------------------------ -
R
--------------------------------- -
R
----------------------------------------------------------------
is being used, use Equation 40. If a resistor divider
DROOP
1
LL
LL
I
FB
IOUT
FL
DCR
⋅
⋅
, can be calculated from Equation 40 or
N 300
N 300
DCR R
⋅
⋅
, can be calculated from Equation 42 or
FL
DROOP
.
⋅
⋅
IOUT
(
R
2
LL
1
+
, placed from this pin to ground can
, can be calculated by the following
is the desired droop voltage at the
R
LL
2
29
)
is the loadline resistance; N is
FB
1
in Figure 6. This resistor’s
, R
1
and R
2
, and C
OCP
2
ΔV
are the current
, the IOUT pin
ΔI
1
2
is being used,
(EQ. 39)
V
I
TRAN
(EQ. 40)
(EQ. 41)
OUT
ISL6312A
1
1
and R
R-C sense circuit consisting of R
use Equation 43.
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed.
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
Since the system poles and zero are affected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately, there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator, by compensating the L-C
poles and the ESR zero of the voltage mode approximation,
yields a solution that is always stable with very close to ideal
transient performance.
Select a target bandwidth for the compensated system, f
The target bandwidth must be large enough to assure
adequate transient performance, but smaller than 1/3 of the
per-channel switching frequency. The values of the
compensation components depend on the relationships of f
to the L-C pole frequency and the ESR zero frequency. For
each of the following three, there is a separate set of
equations for the compensation components.
R
R
FIGURE 20. COMPENSATION CONFIGURATION FOR
IOUT
IOUT
1
=
=
is being used, use Equation 42. If a resistor divider
------------------------------- -
DCR I
------------------------------- -
DCR I
600 N
600 N
R
FB
LOAD-LINE REGULATED ISL6312A CIRCUIT
⋅
⋅
⋅
⋅
OCP
OCP
R
⋅
C
⎛
⎜
⎝
R
-------------------- -
C
1
2
R
+
C
(OPTIONAL)
2
C
R
2
C
⎞
⎟
⎠
and C
1
, R
COMP
VDIFF
I
I
OCP
OCP
2
FB
, and C
C
.
≤
>
I
I
OCP min
OCP min
1
ISL6312A
is being used,
,
,
August 1, 2007
(EQ. 42)
(EQ. 43)
FN9290.3
0
.
0