isl6590dr Intersil Corporation, isl6590dr Datasheet - Page 11

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isl6590dr

Manufacturer Part Number
isl6590dr
Description
Digital Multi-phase Pwm Controller For Core-voltage Regulation
Manufacturer
Intersil Corporation
Datasheet
the status register which then allows accesses to the Non-
Volatile Memory map.
Write-Through Cycles
During startup and local register loading, any incoming
writecycles to the Non-Volatile Memory will be held off until
start up and configuration is complete. During normal
operation, writes to the Non-Volatile Memory shall be
extended until such time that the data is both written to and
read back from the external EEPROM.
Data Setup
Data Hold
CS to MCLK delay
Data Setup
Data Hold
Clock Period
MCLK to CS delay
TIMING NAME
TIMING NAME
FIGURE 5. EEPROM DATA WRITE TIMING
FIGURE 4. EEPROM DATA READ TIMING
TABLE 6. EEPROM DATA READ TIMING
TABLE 7. EEPROM TIMING
PARAMETER
PARAMETER
t
t
CSSU
t
t
DSU
t
DSU
t
CSH
DH
DH
t
P
11
TYPICAL
MIN
480
240
240
480
720
20
20
UNITS
UNITS
ns
ns
ns
ns
ns
ns
ns
ISL6590
ISL6590 Data Write Timing
ISL6590 Data Read Timing
Data Setup
Data Hold
Kick Hold
Stop Hold
SCLK Period
Data Setup
Data Hold
SDATA
TIMING NAME
TIMING NAME
SCLK
FIGURE 6. ISL6590 DATA WRITE TIMING
t
Tp
DSU
FIGURE 7. DATA READ TIMING
TABLE 8. DATA WRITE TIMING
TABLE 9. DATA READ TIMING
PARAMETER
PARAMETER
t
t
t
DSU
DSU
t
t
SPH
t
t
DH
KH
DH
t
DH
p
TYPICAL
TYPICAL
62.5
45
15
15
15
52
14
t
KH
UNITS
UNITS
ns
ns
ns
ns
ns
ns
ns
t
SPH

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