isl6590dr Intersil Corporation, isl6590dr Datasheet - Page 4

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isl6590dr

Manufacturer Part Number
isl6590dr
Description
Digital Multi-phase Pwm Controller For Core-voltage Regulation
Manufacturer
Intersil Corporation
Datasheet
Electrical Specifications
NOTE:
Block Diagram
POWER-ON RESET AND ENABLE
POR Threshold
OUTEN Threshold
OSCILLATOR
Adjustment Range
Max Duty Cycle
1. Reserved for note.
PARAMETER
PLL_FILTER
OSC_OUT
Ext_Reset
PWRGD
OSC_IN
OUTEN
VID[5:0]
MCLK
MDO
MCS
ARX
ATX
MDI
Serial Interface
Asynchronous
Distribution
4
Control and
POR
Clock
Operating Conditions: V
Monitor
State
Fault
V
V
V
V
OUTEN Rising
OUTEN Falling
ddio
ddio
ddcore Rising
ddcore Falling
Rising
Falling
FIGURE 1. ISL6590 BLOCK DIAGRAM
Non-Volatile
SPI EEPOM
Machine
Interface
State
Memory Bus
DDIO
MUX
TEST CONDITIONS
= 3.3V, V
ISL6590
MHz Memory
DDCORE
Registers
Registers
Mapped
Control/
Status
Feedback
= 1.8V, T
Control
A
= 25
Backside Serial
o
PWM Driver
C, Unless Otherwise Specified (Continued)
Current
Voltage
Loop
Loop
Bus
AVP
0.250
MIN
1.4
0.7
24
-
-
-
-
TYP
0.71
0.64
TBD
-
-
-
-
-
IDIG[6:1]
PWM [6:1]
NDRIVE [6:1]
SOC
ERR
SCLK
SDATA
SYS_CLK
ATRH
ATRL
MAX
2.55
1.4
1
-
-
-
-
-
UNITS
MHz
%
V
V
V
V
V
V

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