pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 162

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pc87317vul

Manufacturer Part Number
pc87317vul
Description
Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
The default bank selection after system reset is 0, which
places the module in the UART 16550 mode. Additionally,
setting the baud in bank 1 (as required to initialize the 16550
UART) switches the module to a Non-Extended UART
mode. This ensures that running existing 16550 software
will switch the system to the 16550 configuration without
software modification.
Table 7-1 shows the main functions of the registers in each
bank. Banks 0-3 control both UART and infrared modes of
operation; banks 4-7 control and configure the infrared
modes only.
Bank
0
1
2
3
4
5
6
7
Offset 07h
Offset 06h
Offset 05h
Offset 04h
Offset 02h
Offset 01h
Offset 00h
LCR/BSR
BANK 0
FIGURE 7-1. Register Bank Architecture
UART
TABLE 7-1. Register Bank Summary
BANK 1
BANK 2
Mode
BANK 3
IR
BANK 4
BANK 5
Global Control and Status
Legacy Bank
Baud Generator Divisor,
Extended Control and Status
Module Revision ID and
Shadow Registers
IR mode setup
Infrared Control
Infrared Physical Layer
Configuration
Consumer-IR and Optical
Transceiver Configuration
BANK 6
Enhanced Serial Port with IR - UART2 (Logical Device 5)
16550 Banks
Main Functions
BANK 7
Throughout
All Banks
Common
Register
162
Banks 0 and 1 are the 16550 register banks. The registers
Bank 2 contains the non-legacy Baud Generator Divisor
Bank 3 contains the Module Revision ID and shadow regis-
Bank 4 contains setup parameters for the Infra-red modes.
Bank 5 registers control infrared parameters related to the
Bank 6 registers control physical characteristics involved
Bank 7 registers are dedicated to Consumer-IR configura-
7.4 UART MODES – DETAILED DESCRIPTION
The UART modes support serial data communications with
a remote peripheral device or modem using a wired inter-
face.
The module provides receive and transmit channels that
can operate concurrently in full-duplex mode. This module
performs all functions required to conduct parallel data in-
terchange with the system and composite serial data ex-
change with the external data channel, including:
The module supplies modem control registers, and a prior-
itized interrupt system for efficient interrupt handling.
7.4.1
The module defaults to 16450 mode after power up or reset.
UART 16550 mode is equivalent to 16450 mode, with the
addition of a 16-byte data FIFO for more efficient data I/O.
Transparent compatibility is maintained with this UART
mode in this module.
Despite the many additions to the basic UART hardware
and organization, the UART responds correctly to existing
software drivers with no software modification required.
When 16450 software initializes and addresses this mod-
ule, it will in always perform as a 16450 device.
in these banks are equivalent to the registers contained
in the 16550 UARTs and are accessed by 16550 soft-
ware drivers as if the module was a 16550. Bank 1 con-
tains the legacy Baud Generator Divisor Ports. Bank 0
registers control all other aspects of the UART function,
including data transfers, format setup parameters, inter-
rupt setup and status monitoring.
Ports, and controls the extended features special to this
UART, that are not included in the 16550 repertoire.
These include DMA usage. See ”Extended UART
Mode” on page 163.
ters. The Module Revision ID (MRID) register contains
a code that identifies the revision of the module when
read by software. The shadow registers contain the
identical content as reset-when-read registers within
bank 0. Reading their contents from the shadow regis-
ters lets the system read the register content without re-
setting them.
logical system I/O parameters.
in infrared communications (e.g. pulse width selection).
tion and control.
Format conversion between the internal parallel data
format and the external programmable composite seri-
al format. See Figure 7-2.
Serial data timing generation and recognition
Parallel data interchange with the system using a
choice of bi-directional data transfer mechanisms
Status monitoring for all phases of the communica-
tions activity
16450 or 16550 UART Mode

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