pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 210

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pc87317vul

Manufacturer Part Number
pc87317vul
Description
Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
Bits 7,6 - Reserved
8.7.7
This read-only register returns the number of bytes in the
RX_FIFO. It can be used for software debugging.
Bits 4-0 - Number of Bytes in RX_FIFO (RFL(4-0))
Bits 7,6 - Reserved
Read/Write 0’s.
Note: The contents of TXFLV and RXFLV are not frozen
8.8 BANK 3 – MODULE REVISION ID AND SHADOW
Bank 3 contains the Module Revision ID register which
identifies the revision of the module, shadow registers for
monitoring various registers whose contents are modified
by being read, and status and control registers for handling
the flow control.
04h-07h
0
0
7
Offset
Read/Write 0’s.
These bits specify the number of bytes in the RX_FIFO.
during CPU reads. Therefore, invalid data could be re-
turned if the CPU reads these registers during normal
transmitter and receiver operation. To obtain correct da-
ta, the software should perform three consecutive reads
and then take the data from the second read, if first and
second read yield the same result, or from the third
read, if first and second read yield different results.
00h
01h
02h
03h
REGISTERS
0
0
6
RX_FIFO Current Level Register (RXFLV)
FIGURE 8-25. RXFLV Register Bitmap
0
0
5
TABLE 8-14. Bank 3 Register Set
Register
SH_LCR
SH_FCR Shadow of FIFO Control Register
0
4
Name
MRID
Reserved
LCR/
BSR
0
3
RFL4
0
2
Extended Modes
RFL3
0
1
RFL2
Module Revision ID Register
Shadow of LCR Register
0
0
Line Control Register/
Bank Select Register
Reserved
RFL1
Reset
Required
RFL0
Description
(Read Only)
(Read Only)
Enhanced Serial Port - UART1 (Logical Device 6)
Register (RXFLV)
Current Level
Offset 07h
Bank 2,
210
8.8.1
This read-only register identifies the revision of the module.
When read, it returns the module ID and revision level. This
module returns the code 2xh, where x indicates the revision
number.
Bits 3-0 - Revision ID (MID3-0)
Bits 7-4 - Module ID (MID7-4)
8.8.2
This register returns the value of the LCR register. The LCR
register is written into when a byte value according to Table
8-8 on page 203, is written to the LCR/BSR registers loca-
tion (at offset 03h) from any bank.
See “Line Control Register (LCR)” on page 201 for bit de-
scriptions.
0
0
7
7
The value in these bits identifies the revision level.
The value in these bits identifies the module type.
0
0
6
6
BKSE
FIGURE 8-27. SH_LCR Register Bitmap
Module Revision ID Register (MRID)
Shadow of Line Control Register (SH_LCR)
SBRK
FIGURE 8-26. MRID Register Bitmap
1
0
5
5
Module ID(MID 7-4)
0
0
4
4
STKP
EPS
x
0
3
3
x
0
PEN
2
2
STB
x
0
1
1
Revision ID(RID 3-0)
WLS1
x
0
0
0
Reset
Required
Reset
Required
WLS0
Line Control Register
Module Revision ID
Shadow of
Offset 01h
Offset 00h
(SH_LCR)
Register
Bank 3,
Bank 3,
(MRID)

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