mpc970 Freescale Semiconductor, Inc, mpc970 Datasheet - Page 11

• Manufacturer Part Number: mpc970
• Description: Low Voltage Pll Clock Driver
• Manufacturer: Freescale Semiconductor, Inc

Using the On–Board Crystal Oscillator
allow for seed clock generaytion as well as final distribution.
The on–board oscillator is completely self contained so that
the only external component required is the crystal. As the
oscillator is somewhat sensitive to loading on its inputs the
user is advised to mount the crystal as close to the MPC970
as possible to avoid any board level parasitics. To facilitate
co–location surface mount crystals are recommended, but
not required. In addition, with crystals with a higher shunt
capacitance, it may be necessary to place a 1k resistor
across the two crystal leads.
opposed to the more common parallel resonant circuit, this
eliminates the need for large on–board capacitors. Because
the design is a series resonant design for the optimum
frequency accuracy a series resonant crystal should be used
(see specification table below). Unfortunately most off the
shelf crystals are characterized in a parallel resonant mode.
However a parallel resonant crystal is physically no different
than a series resonant crystal, a parallel resonant crystal is
simply a crystal which has been characterized in its parallel
resonant mode. Therefore in the majority of cases a parallel
specified crystal can be used with the MPC970 with just a
minor frequency error due to the actual series resonant
frequency of the parallel resonant specified crystal. Typically
a parallel specified crystal used in a series resonant mode
will exhibit an oscillatory frequency a few hundred ppm lower
t h a n t h e s p e c i f i e d v a l u e . F o r m o s t p r o c e s s o r
implementations a few hundred ppm translates into kHz
inaccuracies, a level which does not represent a major issue.
* See accompanying text for series versus parallel resonant
generate outputs with programmable frequency relationships
and not a synthesizer with a fixed input frequency. As a result
the crystal input frequency is a function of the desired output
frequency. For a design which utilizes the external feedback
to the PLL the selection of the crystal frequency is straight
forward; simply chose a crystal which is equal in frequency to
the fed back signal. To determine the crystal required to
Table 3. Crystal Specifications
TIMING SOLUTIONS
BR1333 — Rev 6
Crystal Cut
Resonance
Frequency Tolerance
Frequency/Temperature Stability
Operating Range
Shunt Capacitance
Equivalent Series Resistance (ESR)
Correlation Drive Level
Aging
discussion.
The MPC970 features an on–board crystal oscillator to
The oscillator circuit is a series resonant circuit as
The MPC970 is a clock driver which was designed to
Parameter
Fundamental at Cut
Series Resonance*
0 to 70 C
5–7pF
50 to 80Ω
100µW
5ppm/Yr (First 3 Years)
75ppm at 25 C
150pm 0 to 70 C
Value
11
produce the desired output frequency for an application
which utilizes internal feedback the block diagram of Figure 8
should be used. The P and the M values for the MPC970 are
also included in Figure 8. The M values can be found in the
configuration tables included in this applications section.
example of how to determine the crystal frequency required
for a given design.
Given:
From Table 3
From Figure 8
f ref
Driving Transmission Lines
speed signals in a terminated transmission line environment.
To provide the optimum flexibility to the user the output
drivers were designed to exhibit the lowest impedance
possible. With an output impedance of less than 10Ω the
drivers can drive either parallel or series terminated
transmission lines. For more information on transmission
lines the reader is referred to application note AN1091 in the
Timing Solutions brochure (BR1333/D).
distribution of signals is the method of choice. In a
point–to–point scheme either series terminated or parallel
f ref
For the MPC970 clock driver, the following will provide an
The MPC970 clock driver was designed to drive high
In most high performance clock networks point–to–point
2x_PCLK
PCLKEN
BCLK
PCI_CLK
VCO_SEL = ‘1’
+
f ref
PCI_CLK = VCO/16 then N = 16
or
PCLKEN = VCO/4 then N = 4
m = 32 and P = 1
25 · 16 · 1
m = 32
P = 1 (VCO_Sel=‘1’), 2(VCO_Sel=‘0’)
+
f ref
N
Detector
32
Phase
fQn · N · P
f ref
+
Figure 8. PLL Block Diagram
= 200MHz
= 100MHz
= 50MHz
= 25MHz
f VCO
+
m
m
+
fQn · N · P
12.5MHz or
LPF
,
m
m
f VCO
VCO
+
100 · 4 · 1
fQn · N · P
32
P
+
MPC970
MOTOROLA
N
12.5MHz
Qn