74vhc86mtcx-nl Fairchild Semiconductor, 74vhc86mtcx-nl Datasheet

74vhc86mtcx-nl

Manufacturer Part Number

74vhc86mtcx-nl

Description

74vhc86 Quad 2-input Exclusive-or Gate

Manufacturer

Fairchild Semiconductor

Datasheet

1.74VHC86MTCX-NL.pdf (7 pages)

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74VHC86M

74VHC86SJ

74VHC86MTC

74VHC86MTCX_NL

(Note 1)

74VHC86N

74VHC86

Quad 2-Input Exclusive-OR Gate

General Description

The VHC86 is an advanced high speed CMOS Quad

Exclusive OR Gate fabricated with silicon gate CMOS tech-

nology. It achieves the high speed operation similar to

equivalent Bipolar Schottky TTL while maintaining the

CMOS low power dissipation.

An input protection circuit ensures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

age. This device can be used to interface 5V to 3V systems

and on two supply systems such as battery back up. This

circuit prevents device destruction due to mismatched sup-

ply and input voltages.

Ordering Code:

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDEC J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STS-020B). Device available in Tape and Reel only.

Logic Symbol

Pin Descriptions

Order Number

Pin Names

–A

–B

–O

Package

Number

MTC14

M14A

M14D

IEEE/IEC

N14A

Inputs

Outputs

Description

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

DS011517

Features

Connection Diagram

Truth Table

High Speed: t

Low Power Dissipation: I

High Noise Immunity: V

Power down protection is provided on all inputs

Low Noise: V

Pin and Function Compatible with 74HC86

Package Description

OLP

4.8 ns (typ) at V

0.8V (Max.)

NIH

November 1992

Revised February 2005

2 A (Max.) @ T

NIL

28% V

www.fairchildsemi.com

(Min.)

25 C

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74vhc86mtcx-nl Summary of contents

Page 1

... M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC86MTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm (Note 1) Wide 74VHC86N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( OUT Input Diode Current ( Output Diode Current ( Output Current (I ) ...

Page 3

AC Electrical Characteristics V Symbol Parameter (V) t Propagation Delay 3.3 PHL t PLH 5.0 C Input Capacitance IN C Power Dissipation Capacitance PD Note defined as the value of the internal equivalent capacitance which is calculated ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow www.fairchildsemi.com Package Number M14A 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC14 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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