cgs3311 Fairchild Semiconductor, cgs3311 Datasheet - Page 3

• Manufacturer Part Number: cgs3311
• Description: Cmos Crystal Clock Generators
• Manufacturer: Fairchild Semiconductor

Device
3311
3312
3313
3314
3315
3316
3317
3318
3319
Truth Tables
Note: Actual value of the floating OSC_DR and DIVB input is V
Pin Descriptions
Note: Pin out varies for each device.
OSC_IN
OSC_OUT Resistive Buffered Output of the Oscillator
OSC_DR
DIVA
OEH
Functional Table
DIVB DIVA OEL
F
1
0
F
1
0
X
X
0/F
0/F
0/F
1
1
1
X
X
Divide
1, 2, 4
1, 2, 4
8, 16, 32
8, 16, 32
1, 2, 4
4
32
1, 2, 4
1, 2, 4
Input to Oscillator Inverter. The output of the
crystal would be connected here.
Inverter
3 Level input pin that selects Oscillator Drive
Level
Input used to select Binary Divide-by Option.
This pin has CMOS compatible input levels.
Active HIGH 3-STATE enable pin. This pin pulls
to a high value when left floating and 3-STATEs
the output when forced low. This pin has TTL
compatible input levels.
Summary of Device Options
X
0
0
0
0
0
1
X
Division Selection
Enable
OEH
OEH
OEH
OEH
OEL
OEH
OEH
OEH
OEL
OEH Divider Output
X
1
1
1
1
1
X
0
Divide-by 1
Divide-by 2
Divide-by 4
Divide-by 8
Divide-by 16
Divide-by 32
Output Reset HIGH
at Re-enable
Output Reset HIGH
at Re-enable
Drive
L, M, H
H
H
L, M, H
H
H
H
H
L, M, H
Output Rise/
Fall Time (ns)
2, 4
2, 4
4
4
1, 2
4
4
1, 2
2, 4
CC/2
OEL
TRF
OUT
OSCLO_1
OSCLO_2
V
GND
3
CC
Note: Where “F” indicates floating the input.
Each drive has one output with the choices of selecting frequency divide,
output enable, crystal drive and output rise and fall time. Crystal drive
options are:
L
M
H
LOW Drive
HIGH Drive
MEDIUM Drive
OSC_DR
0
1
F
OSC_DR DIV TRF Rise/Fall Time (ns)
F
F
F
F
0,1
0,1
Active LOW 3-STATE enable pin. This pin pulls
to a low value when left floating and 3-STATE
the output when forced HIGH. This pin has TTL
compatible input levels.
Rise and Fall time override pin. Available only
for die form.
This pin is the main clock output on the device.
The Oscillator LOW pin is the ground for the
Oscillator.
This pin is the same signal as OSCLO_1. It has
been provided as an alternate connection for
OSCLO_1 for hybrid assemblies.
The power pin for the chip.
The ground pin for all sections of the circuitry
except the oscillator and oscillator related
circuitry.
Rise and Fall Time Selection
N
N
Y
Y
X
X
Drive Selection
0/F
1
0/F
1
0/F
1
Drive
Low
Medium
High
2
less than 2
4
2
4
2
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