ml2021 Fairchild Semiconductor, ml2021 Datasheet

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ml2021

Manufacturer Part Number
ml2021
Description
Telephone Line Equalizer
Manufacturer
Fairchild Semiconductor
Datasheet

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Features
• Slope, height, and bandwidth adjustable
• Optimized group delays (500 Hz to 6.4 kHz)
• On chip anti-alias filter
• Bypass mode
• Low supply current 6 mA typical from ±5V supplies
• TTL / CMOS compatible interface
• Double buffered data latch
• Selectable master clock 1.544 or 1.536 MHz
• Synchronous or asynchronous data loading capability
• Compatible with ML2003 and ML2004 logarithmic
Block Diagram
ML2021
Telephone Line Equalizer
LATI
CLK
SID
P
gain/attenuator
V
DN
IN
GENERATOR
ANTIALIAS
SECTION
LO PASS
SLOPE
CLKSEL
CLOCK
5
SCK
14-BIT SHIFT REGISTER
14-BIT LATCH
SECTION
HEIGHT
4
14
V
SMOOTHING
CC
BANDPASS
FILTER
SECTION
MUX
LATO
AGND
4
V
SS
1
GND
SOD
V
OUT
General Description
The ML2021 is a monolithic analog line equalizer for tele-
phone applications. The ML2021 consists of a switched
capacitor filter that realizes a family of frequency response
curves optimized for telephone line equalization while mini-
mizing group delay.
The ML2021 consists of a continuous anti-aliasing filter,
three programmable switched capacitor equalization filters,
an output smoothing filter, a 600 Ω driver, and a digital
section for the serial interface.
The equalization filters adjust the slope, height, and band-
width of the frequency response. The desired frequency
response is programmed by a digital 14-bit serial input data
stream.
CLKSEL
CLKSEL
LATO
SOD
GND
SCK
CLK
Pin Connections
LATO
SID
SOD
NC
NC
SCK
CLK
SID
NC
NC
18-PIN SOIC
16-PIN DIP
1
2
3
4
5
6
7
8
9
ML2021
ML2021
TOP VIEW
1
2
3
4
5
6
7
8
TOP VIEW
16
15
14
13
12
11
10
9
18
17
16
15
14
13
12
11
10
www.fairchildsemi.com
V
P
V
AGND
V
V
LATI
GND
CC
DN
OUT
IN
SS
V
P
V
NC
V
NC
V
LATI
AGND
CC
OUT
IN
SS
DN
REV. 1.1.1 3/19/01

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ml2021 Summary of contents

Page 1

... SHIFT REGISTER SCK LATO General Description The ML2021 is a monolithic analog line equalizer for tele- phone applications. The ML2021 consists of a switched capacitor filter that realizes a family of frequency response curves optimized for telephone line equalization while mini- mizing group delay. ...

Page 2

... AGND with respect to GND Analog Input and Output Digital Input and Outputs Input Current Per Pin Power Dissipation Storage Temperature Range Lead Temperature (Soldering, 10 sec) Operating Conditions Parameter 2 Temperature Range ML2021CX ML2021IX Supply Voltage Function = 1, device is in powerdown mode. When Min. ...

Page 3

... V = -12dBm, 1 kHz IN C msg weighted = 0, 4 kHz ≤ frequency ≤ 150 kHz 200mV , 1 kHz sine ML2021 = -7dBm Min Typ. Max. 1.4 ±0.1 2.6 ±0.2 4.7 ±0.2 7.8 ±0.2 11.4 ±0.25 0 ±0.1 0.4 ±0.1 0.9 ±0.2 1.8 ±0.2 3.7 ±0.2 6.6 ±0.25 0 ±0.15 0.5 ±0.2 1.1 ± ...

Page 4

... ML2021 Electrical Characteristics Unless otherwise specifi MIN Other Bits = 100pF 600Ω, dBm measurements use 600Ω as reference load 1kHz sinusoid CLK = 1.544 MHz ±300 Hz and digital time measured at 1.4 V Symbol Parameter Z Input Impedance Output Offset Voltage ...

Page 5

... IPW t t PLD Figure 1. Serial Timing Diagram 1111 120 100 –20 –40 0000 –60 –80 0 3000 3500 4000 B3-B0, H3-H0 = 0000, S3-S0 = 0000 to 1111 OPW 0100 1000 1111 0010 0001 0000 500 1000 1500 2000 2500 3000 3500 4000 FREQUENCY (Hz) ML2021 5 ...

Page 6

... ML2021 12 10.5 9.0 7.5 6.0 4.5 3.0 1.5 0 –1.5 –3.0 0 500 1000 1500 2000 2500 3000 FREQUENCY (Hz) Figure 3. Typical Slope Filter Response—NL 10.5 1111 9.0 7.5 1000 6.0 4.5 0100 3.0 0010 1.5 0 –1.5 0001 –3.0 0 500 1000 1500 2000 2500 3000 FREQUENCY (Hz) Figure 4. Typical Height Filter Response—NL 10.5 9.0 1111 7.5 6.0 4.5 3.0 1.5 0 –1.5 – ...

Page 7

... Hz peaked region. 3.7 4.7 Transfer Function 5.5 The transfer function for the ML2021 is shown below. This 6.3 transfer function is valid for magnitude response only. The 7.2 actual magnitude response from an individual device may 7.8 deviate from the computed response from the transfer func- 8.4 tion by typically 0– ...

Page 8

... V Output Buffer 1.116280E + 04 The final stage in the ML2021 is the output buffer. This amplifier has internal gain of 1 and is capable of driving 600Ω, 100pF loads. Thus suitable for driving telephone hybrids directly without any external amplifier. ...

Page 9

... S0 a) LOAD READ Figure 6. Serial Timing BANDWIDTH Figure 7. 14-Bit Latch NL NL/L HEIGHT BYPASS FUNCTION BIT NUMBER ML2021 9 ...

Page 10

... the device is in normal operation. DN Applications ML2021 OR ML2004 V IN µP Figure 9. Controlling Multiple ML2021 and ML2004 With Only 3 Digital Lines Using One Long Data Word 10 Power Supplies . When The digital section inside the device is powered between DN V and GND volts. The analog section is powered ...

Page 11

... Ordering Information Part Number ML2021CP ML2021CS ML2021IP ML2021IS DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; ...

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