mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 294

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mc68hc912dg128

Manufacturer Part Number
mc68hc912dg128
Description
M68hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Inter-IC Bus
15.7.7 Arbitration Lost
Technical Data
294
If several masters try to engage the bus simultaneously, only one master
wins and the others lose arbitration. The devices which lost arbitration
are immediately switched to slave receive mode by the hardware. Their
data output to the SDA line is stopped, but SCL is still generated until the
end of the byte during which arbitration was lost. An interrupt occurs at
the falling edge of the ninth clock of this transfer with IBAL=1 and
MS/SL=0. If one master attempts to start transmission while the bus is
being engaged by another master, the hardware will inhibit the
transmission; switch the MS/SL bit from 1 to 0 without generating STOP
condition; generate an interrupt to CPU and set the IBAL to indicate that
the attempt to engage the bus is failed. When considering these cases,
the slave service routine should test the IBAL first and the software
should clear the IBAL bit if it is set.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Inter-IC Bus
MC68HC912DG128 — Rev 3.0
MOTOROLA

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