mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 301

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

ATD0CTL3/ATD1CTL3 — ATD Control Register 3
MC68HC912DG128 — Rev 3.0
MOTOROLA
RESET:
Bit 7
0
0
6
0
0
ASCIE — ATD Sequence Complete Interrupt Enable
ASCIF — ATD Sequence Complete Interrupt Flag
FRZ1, FRZ0 — Background Debug (Freeze) Enable (suspend module
operation at breakpoint)
When the AWAI bit is set and the module enters wait mode, most of
the clocks stop and the analog portion powers down. When the
module comes out of wait, it is recommended that a stabilisation delay
(stop and ATD power up recovery time, t
conversions are started. Additionally, the ATD does not re-initialise
automatically on leaving wait mode.
Cannot be written in any mode.
When debugging an application, it is useful in many cases to have the
ATD pause when a breakpoint is encountered. These two bits
determine how the ATD will respond when background debug mode
becomes active.
Freescale Semiconductor, Inc.
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0 = Disables ATD interrupt
1 = Enables ATD interrupt on sequence complete
0 = No ATD interrupt occurred
1 = ATD sequence complete
Table 16-1. ATD Response to Background Debug Enable
FRZ1
5
0
0
0
0
1
1
Analog-to-Digital Converter
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FRZ0
0
1
0
1
4
0
0
Continue conversions in active background mode
3
0
0
Finish current conversion, then freeze
Freeze when BDM is active
2
0
0
ATD Response
Reserved
SR
FRZ1
) is allowed before new
1
0
Analog-to-Digital Converter
FRZ0
Bit 0
0
Technical Data
ATD Registers
$0063/$01E3
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