mc68hc912dg128 Freescale Semiconductor, Inc, mc68hc912dg128 Datasheet - Page 341

• Manufacturer Part Number: mc68hc912dg128
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

17.13.4 msCAN12 Bus Timing Register 0 (CBTR0)
MC68HC912DG128 — Rev 3.0
MOTOROLA
CBTR0
$0102
RESET
W
R
NOTE:
SJW1
Bit 7
0
SJW1, SJW0 — Synchronization Jump Width
BRP5 – BRP0 — Baud Rate Prescaler
The CBTR0 register can only be written if the SFTRES bit in CMCR0 is
set.
SJW0
Freescale Semiconductor, Inc.
The synchronization jump width defines the maximum number of time
quanta (Tq) clock cycles by which a bit may be shortened, or
lengthened, to achieve resynchronization on data transitions on the
bus (see
These bits determine the time quanta (Tq) clock, which is used to
build up the individual bit timing, according to
BRP5
6
0
For More Information On This Product,
0
0
0
0
1
:
:
SJW1
0
0
1
1
BRP4
Table
BRP5
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0
0
0
0
1
:
:
5
0
Table 17-4. Synchronization jump width
MSCAN Controller
17-4).
Table 17-5. Baud rate prescaler
BRP3
0
0
0
0
1
:
:
BRP4
4
0
SJW0
0
1
0
1
BRP2
0
0
0
0
1
:
:
BRP3
3
0
BRP1
Programmer’s Model of Control Registers
0
0
1
1
1
:
:
Synchronization jump width
BRP2
BRP0
2
0
0
1
0
1
1
:
:
2 Tq clock cycles
3 Tq clock cycles
4 Tq clock cycles
1 Tq clock cycle
Table
Prescaler value (P)
BRP1
17-5.
1
0
MSCAN Controller
Technical Data
64
1
2
3
4
:
:
BRP0
Bit 0
0
341