mc68hc05ct4fn Freescale Semiconductor, Inc, mc68hc05ct4fn Datasheet - Page 39

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mc68hc05ct4fn

Manufacturer Part Number
mc68hc05ct4fn
Description
Mc68hc05 Family Of Microcontrollers Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.6 Hardware Interrupts
4.7 External Interrupt (IRQ)
MC68HC05CT4
IRQ VECTOR FETCH
NOTE:
(MASK OPTION)
RST
IRQ PIN
Rev. 2.0
PORT C
LEVEL
All hardware interrupts except RESET are maskable by the I bit in the
CCR. If the I bit is set, all hardware interrupts (internal and external) are
disabled. Clearing the I bit enables the hardware interrupts. The two
types of hardware interrupts are explained in the following sections.
The IRQ pin provides an asynchronous interrupt to the CPU. A block
diagram of the IRQ function is shown in
The BIH and BIL instructions will apply only to the level on the IRQ pin
itself, and not to the output of the logic OR function with the port C IRQ
interrupts. The state of the individual port C pins can be checked by
reading the appropriate port C pins as inputs.
The IRQ pin is one source of an external interrupt. All port C pins
(PC0–PC7) act as other external interrupt sources if the keyscan feature
is enabled as specified by the user.
When edge sensitivity is selected for the IRQ interrupt, it is sensitive to:
Figure 4-2. IRQ Function Block Diagram
Freescale Semiconductor, Inc.
For More Information On This Product,
Falling edge on the IRQ pin
Falling edge on any port C pin with keyscan enabled
Go to: www.freescale.com
V
DD
Interrupts
LATCH
IRQ
R
Figure
General Release Specification
4-2.
Hardware Interrupts
TO BIH & BIL
INSTRUCTION
SENSING
TO IRQ
PROCESSING
IN CPU
Interrupts

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