mc68hc05ct4fn Freescale Semiconductor, Inc, mc68hc05ct4fn Datasheet - Page 61

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mc68hc05ct4fn

Manufacturer Part Number
mc68hc05ct4fn
Description
Mc68hc05 Family Of Microcontrollers Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MC68HC05CT4
NOTE:
Rev. 2.0
STATUS
TIMER
REG.
$16
$17
HIGH
BYTE
INTERRUPT CIRCUIT
ICF OCF TOF $13
COMPARE
COMPARE
REGISTER
The free-running counter is configured to $FFFC during reset and is a
read-only register but only when the timer is enabled. During a power-on
reset, the counter is also preset to $FFFC and begins running only after
the TON bit in the TIMER control register is set. Because the free-
running counter is 16 bits preceded by a fixed divided-by-four prescaler,
the value in the free-running counter repeats every 262,144 internal bus
clock cycles. When the counter rolls over from $FFFF to $0000, the TOF
bit is set. An interrupt can also be enabled when counter roll-over occurs
by setting its interrupt enable bit (TOIE).
The I bit in the CCR should be set while manipulating both the high and
low byte registers of a specific timer function to ensure that an interrupt
does not occur.
OUTPUT
CIRCUIT
OUTPUT
LOW
BYTE
Freescale Semiconductor, Inc.
Figure 8-1. 16-Bit Timer Block Diagram
For More Information On This Product,
PROCESSOR
FOLVL
INTERNAL
CLOCK
INTERNAL BUS
Go to: www.freescale.com
4
ICIE
HIGH
BYTE
16-BIT FREE
ALTERNATE
OVERFLOW
REGISTER
COUNTER
COUNTER
RUNNING
DETECT
CIRCUIT
OCIE
16-Bit Timer
BUFFER
8-BIT
TOIE
LOW
BYTE
$18
$19
$1A
$1B
IEDG OLVL
HIGH
BYTE
REGISTER
CAPTURE
DETECT
CIRCUIT
INPUT
EDGE
OUTPUT
TIMER
CONTROL
REG.
$12
LOW
BYTE
LEVEL
REG.
$14
$15
RESET
D
CLK
C
Q
General Release Specification
OUTPUT
(TCMP)
LEVEL
PD6
(TCAP)
INPUT
EDGE
Counter Register
16-Bit Timer

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