mc68hc05ct4fn Freescale Semiconductor, Inc, mc68hc05ct4fn Datasheet - Page 66

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mc68hc05ct4fn

Manufacturer Part Number
mc68hc05ct4fn
Description
Mc68hc05 Family Of Microcontrollers Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16-Bit Timer
8.8 Timer During Wait Mode
General Release Specification
TOF — Timer Overflow Flag
Bits 0–4 — Not Used
Accessing the timer status register satisfies the first condition required
to clear status bits. The remaining step is to access the register
corresponding to the status bit.
A problem can occur when using the timer overflow function and reading
the free-running counter at random times to measure an elapsed time.
Without incorporating the proper precautions into software, the timer
overflow flag could unintentionally be cleared if:
The counter alternate register at address $1A and $1B contains the
same value as the free-running counter at address $18 and $19; this
alternate register can be read at any time without affecting the timer
overflow flag in the timer status register.
The CPU clock halts during wait mode, but the timer remains active if
turned on prior to entering wait mode. If interrupts are enabled, a timer
interrupt will cause the processor to exit wait mode.
Reset clears this bit.
Always read zero.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Flag set when free-running counter transitions from $FFFF to
0 = Flag cleared when TSR and counter low register ($19) are
The timer status register is read or written when TOF is set.
The MSB of the free-running counter is read but not for the
purpose of servicing the flag.
$0000 occurs
accessed
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16-Bit Timer
MC68HC05CT4
Rev. 2.0

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