mc68hc05ct4fn Freescale Semiconductor, Inc, mc68hc05ct4fn Datasheet - Page 48

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mc68hc05ct4fn

Manufacturer Part Number
mc68hc05ct4fn
Description
Mc68hc05 Family Of Microcontrollers Mcus
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Resets
5.4.2.5 COP Register
5.4.3 Illegal Address
General Release Specification
$1FF0
Addr
and COP Watchdog Timer
Unimplemented Vector
Register Name
The COP register is shared with the MSB of an unimplemented user
interrupt vector as shown in
whatever user data has been programmed at this location. Writing a zero
to the COPR bit in this location clears the COP watchdog timer.
An illegal address reset is generated when the CPU attempts to fetch an
instruction from either unimplemented address space ($0130 to $0AFF)
or I/O address space ($0000 to $002F).
IF the following conditions exist:
Figure 5-3. COP Watchdog Timer Location
WAIT Time More than COP Timeout
Freescale Semiconductor, Inc.
WAIT Time less than COP Timeout
For More Information On This Product,
Read:
Write:
Any length WAIT Time
Table 5-1. COP Watchdog Timer Recommendations
WAIT Time
Go to: www.freescale.com
Bit 7
X
= Unimplemented
Resets
6
X
Figure
X
5
THEN the COP Watchdog Timer should be:
5-3. Reading this location returns
Enable or Disable COP by Mask Option
X
4
Disable COP by Mask Option
Disable COP by Mask Option
3
X
MC68HC05CT4
X
2
X
1
Rev. 2.0
COPR
Bit 0
X

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