mc68hc705k1 Freescale Semiconductor, Inc, mc68hc705k1 Datasheet
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... Freescale Semiconductor, Inc MC68HC705K1 HCMOS Microcontroller Unit For More Information On This Product, Go to: www.freescale.com MC68HC705K1/D Rev. 2.0 TECHNICAL DAT A ...
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... Freescale Semiconductor, Inc. Technical Data Technical Data For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... Section 7. Parallel Input/Output (I/O Section 8. Multifunction Timer . . . . . . . . . . . . . . . . . . . . . 75 Section 9. EPROM/OTPROM . . . . . . . . . . . . . . . . . . . . . . 83 Section 10. Personality EPROM (PEPROM Section 11. Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . 99 Section 12. Electrical Specifications . . . . . . . . . . . . . . . 117 Section 13. Mechanical Specifications . . . . . . . . . . . . . 133 Section 13. Ordering Information . . . . . . . . . . . . . . . . . 137 MC68HC705K1 — Rev. 2.0 For More Information On This Product, List of Sections Go to: www.freescale.com List of Sections Technical Data ...
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... Freescale Semiconductor, Inc. List of Sections Technical Data List of Sections For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... Technical Data — MC68HC705K1 1.1 1.2 1.3 1.4 1.5 1.6 1.6.1 1.6.2 1.6.2.1 1.6.2.2 1.6.2.3 1.6.2.4 1.6.2.5 1.6.3 1.6.4 1.6.5 1.6.6 2.1 2.2 2.3 2.4 2.5 MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 1. General Description Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Mask Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 MCU Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 V and . OSC1 and OSC2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Ceramic Resonator . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 2-Pin RC Oscillator .22 3-Pin RC Oscillator .23 External Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 IRQ .24 PP PA7– ...
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... Interrupt Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 Software Interrupt .40 External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 IRQ/V Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 PP PA3–PA0 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 IRQ Status and Control Register . . . . . . . . . . . . . . . . . . .45 Timer Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 Timer Overflow Interrupt . . . . . . . . . . . . . . . . . . . . . . . . .46 Real-Time Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47 Section 5. Resets Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 Table of Contents For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... MC68HC705K1 — Rev. 2.0 For More Information On This Product, Reset Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Power-On Reset .52 External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Computer Operating Properly (COP) Reset . . . . . . . . . . . . .54 Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 Low-Voltage Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 I/O Port Registers .56 Multifunction Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 COP Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 Section 6. Low-Power Modes Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Wait Mode .58 Halt Mode ...
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... EPROM/OTPROM Programming . . . . . . . . . . . . . . . . . . . . . . .85 EPROM Erasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 Mask Option Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87 Section 10. Personality EPROM (PEPROM) Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 PEPROM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 PEPROM Bit Select Register . . . . . . . . . . . . . . . . . . . . . . . .93 PEPROM Status and Control Register .95 PEPROM Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96 PEPROM Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96 PEPROM Erasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 Table of Contents For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 11. Instruction Set Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .99 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Inherent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Immediate .101 Direct . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Extended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Indexed, No Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102 Indexed, 8-Bit Offset .102 Indexed, 16-Bit Offset .102 Relative . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103 Instruction Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103 Register/Memory Instructions ...
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... Plastic Dual In-Line Package (Case 648 .134 Small Outline Integrated Circuit (Case 751 .134 Ceramic Dual In-Line Package (Case 620 .135 Section 13. Ordering Information Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137 MCU Order Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137 Table of Contents For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... MC68HC705K1 — Rev. 2.0 For More Information On This Product, Title MC68HC705K1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . .18 Pin Assignments .19 Bypassing Layout Recommendation . . . . . . . . . . . . . . . . . . .19 Crystal Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 2-Pin Ceramic Resonator Connections . . . . . . . . . . . . . . . . .21 3-Pin Ceramic Resonator Connections . . . . . . . . . . . . . . . . .22 2-Pin RC Oscillator Connections . . . . . . . . . . . . . . . . . . . . . .22 3-Pin RC Oscillator Connections . . . . . . . . . . . . . . . . . . . . . .23 External Clock Connections . . . . . . . . . . . . . . . . . . . . . . . . . .24 Memory Map .27 I/O Register Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Accumulator (A) ...
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... Internal Clock Frequency . . . . . . . . . . . . . .124 DD Stop I versus Temperature .125 DD External Interrupt Timing . . . . . . . . . . . . . . . . . . . . . . . . . . .128 Stop Mode Recovery Timing . . . . . . . . . . . . . . . . . . . . . . . .128 Power-On Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . .129 List of Figures For More Information On This Product, Go to: www.freescale.com Page = 5 .131 .131 .132 .132 DD MC68HC705K1 — Rev. 2.0 ...
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... PEPROM Bit Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94 Register/Memory Instructions .104 Read-Modify-Write Instructions . . . . . . . . . . . . . . . . . . . . . .105 Jump and Branch Instructions . . . . . . . . . . . . . . . . . . . . . . .107 Bit Manipulation Instructions .108 Control Instructions .109 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . .110 Opcode Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .116 MC68HC705K1 Order Numbers .137 List of Tables Go to: www.freescale.com List of Tables Page Technical Data ...
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... Freescale Semiconductor, Inc. List of Tables Technical Data List of Tables For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... Introduction The MC68HC705K1 is a member of the low-cost, high-performance M68HC05 Family of 8-bit microcontroller units (MCU). The M68HC05 Family is based on the customer-specified integrated circuit (CSIC) design strategy. All MCUs in the family use the popular M68HC05 central processor unit (CPU) and are available with a variety of subsystems, memory sizes and types, and package types. MC68HC705K1 — ...
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... Freescale Semiconductor, Inc. General Description On-chip memory of the MC68HC705K1 includes 504 bytes of erasable, programmable read-only memory (EPROM). In packages without the transparent window for EPROM erasure, the 504 EPROM bytes serve as one-time programmable read-only memory (OTPROM). 1.3 Features Features of the MCU include: • ...
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... Freescale Semiconductor, Inc. • • • 1.4 Mask Options These MC68HC705K1 options are programmable in the mask option register (MOR): • • • • • • • • The mask option register is an EPROM/OTPROM byte at location $0017. register and the EPROM/OTPROM programming procedure. ...
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... COP WATCHDOG AND ILLEGAL ADDRESS DETECT LOW-VOLTAGE V DD DETECT V SS OSC1 INTERNAL OSCILLATOR OSC2 Figure 1-1. MC68HC705K1 Block Diagram Technical Data USER EPROM/OTPROM 504 BYTES MASK OPTION REGISTER EPROM/OTPROM PERSONALITY EPROM/OTPROM 64 BITS USER RAM 32 BYTES ARITHMETIC/LOGIC UNIT ACCUMULATOR M68HC05 MCU INDEX REGISTER ...
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... To prevent noise problems, take special care to provide good power supply bypassing at the MCU. Place bypass capacitors as close to the MCU as possible, as Figure 1-3 MC68HC705K1 — Rev. 2.0 For More Information On This Product, shows the MC68HC705K1 pin assignments. RESET 1 PB1/OSC3 2 PB0 ...
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... External clock signal . OP Figure 1-4 shows a typical crystal oscillator circuit for an MCU 2 M XTAL Figure 1-4. Crystal Connections General Description For More Information On This Product, Go to: www.freescale.com . The MCU divides the OSC V SS OSC1 XTAL OSC2 MC68HC705K1 — Rev. 2.0 ...
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... The load capacitance values used in the oscillator circuit design should include all stray layout capacitances. To minimize output distortion, mount the resonator and capacitors as close as possible to the pins MC68HC705K1 — Rev. 2.0 For More Information On This Product, 9.6 Mask Option Figure 1-5 for a 2-pin ceramic resonator or ...
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... The OSC2 signal is a square wave, and the signal MCU R C3 Figure 1-7. 2-Pin RC Oscillator Connections General Description For More Information On This Product, Go to: www.freescale.com V SS OSC1 CER. RES. OSC2 Register. Clearing the OSC1 R C3 OSC2 MC68HC705K1 — Rev. 2.0 ...
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... External Clock An external clock from another CMOS-compatible device can drive the OSC1 input, with the OSC2 pin unconnected, as MC68HC705K1 — Rev. 2.0 For More Information On This Product, 9.6 Mask Option 1-8. The 3-pin oscillator is more stable than the 2-pin oscillator. ...
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... Figure 1-9. External Clock Connections 5.3.2 External Reset for more information. pin has these functions: PP Applying asynchronous external interrupt signals, see 4.3.2 External Interrupts Applying the EPROM/OTPROM programming voltage, see 9.4 EPROM/OTPROM Programming 7.4 Port A. 7.5 Port General Description For More Information On This Product, Go to: www.freescale.com B. MC68HC705K1 — Rev. 2.0 ...
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... Input/output (I/O) registers are memory-mapped so that the CPU can access their locations in the same way that it accesses all other memory locations. Figure 2-1 Figure 2-2 section. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Memory Map .25 Input/Output Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Random-Access Memory (RAM .26 EPROM/OTPROM ...
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... NOTE: Be careful when using nested subroutines or multiple interrupt levels. The CPU may overwrite data in the RAM during a subroutine or during the interrupt stacking operation. Technical Data Figure Memory For More Information On This Product, Go to: www.freescale.com 2-2. MC68HC705K1 — Rev. 2.0 ...
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... TEST ROM AND COP REGISTER (8 BYTES) $03F7 $03F8 USER VECTORS (EPROM) 8 BYTES $03FF MC68HC705K1 — Rev. 2.0 For More Information On This Product, PORT A DATA REGISTER PORT B DATA REGISTER UNUSED UNUSED PORT A DATA DIRECTION REGISTER PORT B DATA DIRECTION REGISTER UNUSED UNUSED ...
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... PA1 PB1/ OSC3 DDRA3 DDRA2 DDRA1 DDRB1 RT1 TOFR RTIFR Bit 3 Bit 2 Bit IRQF 0 0 IRQR Reserved U = Unaffected MC68HC705K1 — Rev. 2.0 Bit 0 PA0 PB0 DDRA0 0 DDRB0 0 RT0 1 Bit ...
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... Mask Option Register $0017 (MOR) Write: See page 87. Reset: Read: EPROM Programming $0018 Register (EPROG) Write: See page 84. Reset: Figure 2-2. I/O Register Summary (Sheet MC68HC705K1 — Rev. 2.0 For More Information On This Product, Bit PEB7 PEB6 PEB5 PEB4 ...
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... EPROM cannot be erased and serves as a 64-bit array of OTPROM. Technical Data Bit Read: Write Read: Write Unimplemented Memory For More Information On This Product, Go to: www.freescale.com LVRF Reserved U = Unaffected MC68HC705K1 — Rev. 2.0 Bit 0 U COPC 0 ...
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... Contents 3.2 3.3 3.3.1 3.3.2 3.3.3 3.3.4 3.3.5 3.4 3.2 Introduction This section describes the central processor unit (CPU) registers. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 CPU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Index Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Stack Pointer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Program Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Condition Code Register . . . . . . . . . . . . . . . . . . . . . . . . . . .36 Arithmetic/Logic Unit (ALU .37 Central Processor Unit (CPU) Go to: www.freescale.com ...
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... Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com ACCUMULATOR ( INDEX REGISTER ( STACK 1 POINTER (SP PROGRAM COUNTER (PC CONDITION CODE REGISTER (CCR) MC68HC705K1 — Rev. 2.0 ...
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... See Offset, and indexed addressing. The 8-bit index register also can serve as a temporary data storage location. Read: Write: Reset: MC68HC705K1 — Rev. 2.0 For More Information On This Product, Figure 3-2 Bit Unaffected by reset Figure 3-2. Accumulator (A) Figure 3-3 to determine the conditional address of 11 ...
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... Unimplemented Technical Data Figure 3 Figure 3-4. Stack Pointer (SP) Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com is a 16-bit register that MC68HC705K1 — Rev. 2.0 Bit 0 1 ...
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... Read Write: Reset MC68HC705K1 — Rev. 2.0 For More Information On This Product Loaded with vector from $03FE and $03FF Figure 3-5. Program Counter (PC) Central Processor Unit (CPU) Go to: www.freescale.com Central Processor Unit (CPU) ...
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... STOP, or WAIT instruction. Technical Data Bit Unimplemented Figure 3-6. Condition Code Register (CCR) Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com Figure 3 8-bit Bit Unaffected MC68HC705K1 — Rev. 2.0 ...
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... Multiplication is not performed as a discrete operation but as a chain of addition and shift operations within the ALU. The multiply instruction requires 11 internal clock cycles to complete this chain of operations. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Central Processor Unit (CPU) Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. Central Processor Unit (CPU) Technical Data Central Processor Unit (CPU) For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... Introduction This section describes how interrupts temporarily change the normal processing sequence. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 4. Interrupts Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 Interrupt Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 Software Interrupt .40 External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40 IRQ/V Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 PP PA3–PA0 Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 IRQ Status and Control Register . . . . . . . . . . . . . . . . . . .45 Timer Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 Timer Overflow Interrupt ...
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... A timer overflow (timer interrupt) Expiration of the real-time interrupt period (timer interrupt) IRQ/V pin PP PA3–PA0 pins when port A external interrupts are enabled Interrupts For More Information On This Product, Go to: www.freescale.com pin (external interrupt) PP MC68HC705K1 — Rev. 2.0 ...
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... See Programming the LEVEL bit to a logic 1 selects the edge- and level-sensitive trigger option. When LEVEL = 1: • • MC68HC705K1 — Rev. 2.0 For More Information On This Product, pin latches an external interrupt PP IRQ latch IRQE bit in the interrupt status and control register ...
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... IRQ STATUS/CONTROL REGISTER INTERNAL DATA BUS Figure 4-1. External Interrupt Logic Interrupts For More Information On This Product, Go to: www.freescale.com pin latches an external interrupt pin returns to logic 1 and then falls pin BIH & BIL INSTRUCTION PROCESSING EXTERNAL INTERRUPT REQUEST MC68HC705K1 — Rev. 2.0 ...
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... Programming the LEVEL bit to a logic 1 selects the edge- and level-sensitive trigger option. When LEVEL = 1: • • • MC68HC705K1 — Rev. 2.0 For More Information On This Product, Register. An interrupt signal on a PA3–PA0 pin IRQ latch IRQE bit in the IRQ status and control register I bit in the condition code register. A rising edge or a high level on a PA3– ...
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... A subsequent IRQ/V pin interrupt request can be latched only PP after the voltage level of the previous IRQ/V returns to a logic 1 and then falls again to a logic 0. Interrupts For More Information On This Product, Go to: www.freescale.com pin latches an external interrupt interrupt signal PP MC68HC705K1 — Rev. 2.0 ...
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... These conditions set the IRQF bit: The CPU clears the IRQF bit when fetching the interrupt vector. Writing to the IRQF bit has no effect. Writing a logic 1 to the IRQR bit clears the IRQF bit. MC68HC705K1 — Rev. 2.0 For More Information On This Product, $000A Bit 7 ...
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... RTIE, is also set. See Technical Data 1 = IRQF bit cleared effect Timer overflow interrupt Real-time interrupt 8.3 Timer Status and Control 8.3 Timer Status and Control Interrupts For More Information On This Product, Go to: www.freescale.com Register. Register. MC68HC705K1 — Rev. 2.0 ...
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... STACKING ORDER Figure 4-3. Interrupt Stacking Order MC68HC705K1 — Rev. 2.0 For More Information On This Product, Stores the CPU registers on the stack in the order shown in Figure 4-3 Sets the I bit in the condition code register to prevent further interrupts Loads the program counter with the contents of the appropriate interrupt vector locations: – ...
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... PIRQ PIRQ TOFE bit I bit None RTIE bit Interrupts For More Information On This Product, Go to: www.freescale.com Priority Vector (1 = Highest) Address (1) 1 $03FE–$03FF (2) Same priority $03FC–$03FD as instruction ( $03FA–$03FB $03F8–$03F9 MC68HC705K1 — Rev. 2.0 ...
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... Freescale Semiconductor, Inc. Figure 4-4 MC68HC705K1 — Rev. 2.0 For More Information On This Product, shows the sequence of events caused by an interrupt. FROM RESET YES I BIT SET? NO YES EXTERNAL INTERRUPT? NO YES TIMER INTERRUPT? STACK PCL, PCH CCR NO LOAD PC WITH INTERRUPT VECTOR FETCH NEXT ...
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... Freescale Semiconductor, Inc. Interrupts Technical Data Interrupts For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... Introduction This section describes the five reset sources and how they initialize the microcontroller unit (MCU). MC68HC705K1 — Rev. 2.0 For More Information On This Product, Reset Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Power-On Reset .52 External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Computer Operating Properly (COP) Reset . . . . . . . . . . . . .54 Illegal Address Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 Low-Voltage Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 Reset States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55 CPU ...
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... V voltage below nominal 3.5 volts (low-voltage reset) DD pin generates a power-on reset. The DD (internal clock cycle) delay after the oscillator becomes CYC , the MCU remains in the reset condition CYC Resets For More Information On This Product, Go to: www.freescale.com generates CYC MC68HC705K1 — Rev. 2.0 ...
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... POWER-ON RESET ILLEGAL ADDRESS RESET INTERNAL ADDRESS BUS RESET NOTE: To avoid overloading some power supply designs, do not connect the RESET pin directly to V MC68HC705K1 — Rev. 2.0 For More Information On This Product, INTERNAL CLOCK Figure 5-1. Reset Sources . Use a pullup resistor more. DD Resets Go to: www ...
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... An illegal address reset pulls the RESET pin low for one cycle of the internal clock. Technical Data $03F0 Bit Unimplemented U = Unaffected Figure 5-2. COP Register (COPR) Resets For More Information On This Product, Go to: www.freescale.com 8.5 COP Bit 0 COPC MC68HC705K1 — Rev. 2.0 ...
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... MC68HC705K1 — Rev. 2.0 For More Information On This Product, pin falls below 3.5 V (nominal). V 9.6 Mask Option Loads the stack pointer with $FF Sets the I bit in the condition code register, inhibiting interrupts Sets the IRQE bit in the interrupt status and control register ...
Page 56
... Clears bits PDIB1 and PDIB0 in pulldown register B so that port B pulldown devices are enabled Has no effect on port A or port B data registers Clears the timer status and control register Clears the timer counter register Resets For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 57
... If the SWAIT bit in the mask option register (MOR) is programmed to a logic 0, the STOP instruction puts the microcontroller unit (MCU) in its lowest power-consumption mode and has these effects on the MCU: • • • MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 6. Low-Power Modes Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Wait Mode .58 Halt Mode ...
Page 58
... Sets the IRQE bit in the IRQ status and control register, enabling external interrupts Stops the CPU clock, but allows the internal oscillator and timer clock to continue to run Low-Power Modes For More Information On This Product, Go to: www.freescale.com pin — A high-to-low PP MC68HC705K1 — Rev. 2.0 ...
Page 59
... MCU exits halt mode. When the SWAIT bit is set, the COP watchdog cannot be inadvertently turned off by a STOP instruction. Figure 6-1 MC68HC705K1 — Rev. 2.0 For More Information On This Product, An external interrupt signal on the IRQ/V transition on the IRQ/V pin loads the program counter with the PP contents of locations $03FA and $03FB ...
Page 60
... TURN ON CPU CLOCK OR Low-Power Modes For More Information On This Product, Go to: www.freescale.com WAIT CLEAR I BIT IN CCR SET IRQE BIT IN ISCR TURN OFF CPU CLOCK TIMER CLOCK ACTIVE YES EXTERNAL RESET? NO YES EXTERNAL INTERRUPT? NO YES TIMER INTERRUPT? NO YES COP RESET? NO MC68HC705K1 — Rev. 2.0 ...
Page 61
... Drive the RESET pin to a logic 0. 2. Lower the V To take the MCU out of data-retention mode: 1. Return V 2. Return the RESET pin to a logic 1. MC68HC705K1 — Rev. 2.0 For More Information On This Product, voltage. The RESET pin must remain low DD continuously during data-retention mode. ...
Page 62
... Freescale Semiconductor, Inc. Low-Power Modes Technical Data Low-Power Modes For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 63
... Introduction This section describes the two bidirectional input/output (I/O) ports: • • MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 7. Parallel Input/Output (I/O) Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 I/O Port Function Port Port A Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Data Direction Register Pulldown Register A (PDRA Port A External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Port A Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Port B ...
Page 64
... PA7–PA4) External interrupt capability (pins PA3–PA0) $0000 Bit PA7 PA6 PA5 PA4 Unaffected by reset Figure 7-1. Port A Data Register (PORTA) Parallel Input/Output (I/O) For More Information On This Product, Go to: www.freescale.com Bit 0 PA3 PA2 PA1 PA0 MC68HC705K1 — Rev. 2.0 ...
Page 65
... These read/write bits control port A data direction. Reset clears bits DDRA7–DDRA0. NOTE: Avoid glitches on port A pins by writing to the port A data register before changing DDRA bits from logic 0 to logic 1. MC68HC705K1 — Rev. 2.0 For More Information On This Product, $0004 Bit ...
Page 66
... PDIA4 Unimplemented Figure 7-3. Pulldown Register A (PDRA Corresponding port A pin pulldown device turned off 0 = Corresponding port A pin pulldown device turned on Parallel Input/Output (I/O) For More Information On This Product, Go to: www.freescale.com Bit 0 PDIA3 PDIA2 PDIA1 PDIA0 MC68HC705K1 — Rev. 2.0 ...
Page 67
... WRITE $0004 WRITE $0000 READ $0000 WRITE $0010 RESET MASK OPTION REGISTER ($0017) MC68HC705K1 — Rev. 2.0 For More Information On This Product, pin. The active interrupt state for the PA3–PA0 pins pin, not the state of the internal IRQ signal. Therefore, PP shows the port A I/O logic ...
Page 68
... Table 7-1 Accesses Accesses to DDRA to PORTA Read/Write Read Write DDRA7–DDRA0 Pin PA7–PA0 DDRA7–DDRA0 PA7-PA0 PA7–PA0 DDRA7–DDRA0 Pin PA7–PA0 DDRA7–DDRA0 PA7-PA0 PA7–PA0 DDRA7–DDRA0 Pin PA7–PA0 DDRA7–DDRA0 PA7-PA0 PA7–PA0 MC68HC705K1 — Rev. 2.0 ...
Page 69
... This read/write data bit is software programmable. Data direction of PB0 is under the control of the DDRB0 bit in data direction register B. Bits 7–2 — Not Used Bits 7–2 always read as logic 0s. Writes to these bits have no effect. MC68HC705K1 — Rev. 2.0 For More Information On This Product, $0001 Bit 7 ...
Page 70
... Bit Unimplemented Figure 7-6. Data Direction Register B (DDRB Corresponding port B pin configured as output 0 = Corresponding port B pin configured as input Parallel Input/Output (I/O) For More Information On This Product, Go to: www.freescale.com Bit DDRB1 DDRB0 MC68HC705K1 — Rev. 2.0 ...
Page 71
... SWPDI bit is set to a logic 1. NOTE: Avoid a floating port B input by clearing its pulldown register bit before changing its DDRB bit from logic 1 to logic 0. Do not use read-modify-write instructions on pulldown register B. 7.5.4 Port B Logic Figure 7-8 MC68HC705K1 — Rev. 2.0 For More Information On This Product, $0011 Bit ...
Page 72
... MASK OPTION REGISTER ($0017) DATA DIRECTION REGISTER B BIT DDRB0 PORT B DATA REGISTER BIT PB0 PULLDOWN REGISTER B BIT PDIB0 Figure 7-8. Port B I/O Circuit Parallel Input/Output (I/O) For More Information On This Product, Go to: www.freescale.com TO 3-PIN OSCILLATOR PB1/ OSC3 100- A PULLDOWN DEVICE PB0 100- A PULLDOWN DEVICE MC68HC705K1 — Rev. 2.0 ...
Page 73
... X = Don’t care Undefined MC68HC705K1 — Rev. 2.0 For More Information On This Product, Table 7-2 summarizes the operation of the Table 7-3 summarizes the operation of the PB1/OSC3 Table 7-2. PB0 Pin Functions Accesses PB0 to PDRB Pin Mode Read Write ...
Page 74
... PB1 PB1 PDIB1 DDRB1 Pin PB1 PDIB1 DDRB1 PB1 PB1 PDIB1 DDRB1 Pin PB1 PDIB1 DDRB1 PB1 PB1 PDIB1 DDRB1 Pin PB1 PDIB1 DDRB1 PB1 PB1 PDIB1 DDRB1 Pin PB1 PDIB1 DDRB1 PB1 PB1 PDIB1 DDRB1 PB1 PB1 MC68HC705K1 — Rev. 2.0 ...
Page 75
... Introduction This section describes the operation of the multifunction timer and the computer operating properly (COP) watchdog. organization of the timer subsystem. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 8. Multifunction Timer Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75 Timer Status and Control Register . . . . . . . . . . . . . . . . . . . . . .77 Timer Counter Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 COP Watchdog .80 Multifunction Timer Go to: www ...
Page 76
... RESET TIMER STATUS/CONTROL REGISTER RTI RATE SELECT BITS 8–14 OF 15-STAGE RIPPLE COUNTER Multifunction Timer For More Information On This Product, Go to: www.freescale.com RESET INTERNAL CLOCK 4 (XTAL 2) INTERRUPT REQUEST RESET POWER-ON RESET (POR COP RESET MC68HC705K1 — Rev. 2.0 ...
Page 77
... RTIFR bit. Writing to RTIF has no effect. Reset clears RTIF. TOIE — Timer Overflow Interrupt Enable Bit This read/write bit enables timer overflow interrupts. Reset clears TOIE. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Timer interrupt enable bits Timer interrupt flags ...
Page 78
... Cycles (1) Period to RTI 14 8 16,384 15 16 32,768 16 32 65,536 17 65 131,072 Multifunction Timer For More Information On This Product, Go to: www.freescale.com Number COP Timeout of Cycles (1) Period to COP Reset 17 65 131,072 18 131 262,144 19 262 524,288 20 524 1,048,576 MC68HC705K1 — Rev. 2.0 ...
Page 79
... MCU to come out of reset. A timer overflow function at the eighth counter stage allows a timer interrupt every 1024 internal clock cycles. Each count of the timer counter register takes eight oscillator cycles or four cycles of the internal clock. MC68HC705K1 — Rev. 2.0 For More Information On This Product, $0009 Bit 7 6 ...
Page 80
... Technical Data $03F0 Bit Unimplemented U = Unaffected Figure 8-4. COP Register (COPR) pin exceeds 2 PP Multifunction Timer For More Information On This Product, Go to: www.freescale.com Bit 0 COPC the COP watchdog DD voltage falls below MC68HC705K1 — Rev. 2.0 . ...
Page 81
... The SWAIT bit in the mask option register converts STOP instructions to HALT instruc- tions. 2. Reset the COP watchdog immediately before executing the WAIT/HALT instruction Don’t care MC68HC705K1 — Rev. 2.0 For More Information On This Product, summarizes recommended conditions for enabling and Table 8-2. COP Watchdog Recommendations ...
Page 82
... Freescale Semiconductor, Inc. Multifunction Timer Technical Data Multifunction Timer For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 83
... This section describes how to program the 504-byte erasable, programmable read-only memory (EPROM)/one-time programmable read-only memory (OTPROM). NOTE: In packages with no quartz window, the 504 bytes of EPROM function as an OTPROM. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 9. EPROM/OTPROM Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83 EPROM Programming Register . . . . . . . . . . . . . . . . . . . . . . . .84 EPROM/OTPROM Programming . . . . . . . . . . . . . . . . . . . . . . .85 EPROM Erasing ...
Page 84
... MOR programming power switched MOR programming power switched off 1 = EPROM/OTPROM programming power switched EPROM/OTPROM programming power switched off EPROM/OTPROM For More Information On This Product, Go to: www.freescale.com Bit 0 R ELAT MPGM EPGM pin PP pin to the PP MC68HC705K1 — Rev. 2.0 ...
Page 85
... Bits 7–3 — Reserved Bits 7–3 are factory test bits that always read as logic 0s. 9.4 EPROM/OTPROM Programming The MC68HC705K1 does not contain built-in bootloader ROM code. To program this device, use an external programming system such as the M68HC705KICS evaluation module (EVM M68HC705K1GANG programmer. ...
Page 86
... For More Information On This Product, Go to: www.freescale.com 220 16 OSC1 15 OSC2 0 PA7 11 PA6 10 PA5 PA4 16 OSC1 15 OSC2 PA7 11 PA6 10 PA5 9 PA4 IN5817 CAP 4 GND 100 1 MC68HC705K1 — Rev. 2.0 ...
Page 87
... The mask option register is unaffected by reset. The erased state of the mask option register is $0000. Address: Read: Write: Reset: Erased: MC68HC705K1 — Rev. 2.0 For More Information On This Product, Port A and port B programmable pulldown devices (enable or disable) Oscillator connections (2-pin or 3-pin RC oscillator) Oscillator connections (RC oscillator or crystal/ceramic resonator) STOP instruction (enable or disable) ...
Page 88
... Oscillator configured for external RC network 0 = Oscillator configured for external crystal, ceramic resonator, or clock source 1 = STOP instruction converted to WAIT instruction 0 = STOP instruction not converted to WAIT instruction 1 = LVR circuit enabled 0 = LVR circuit disabled EPROM/OTPROM For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 89
... In 3-pin RC oscillator configurations, the personality EPROM (PEPROM) cannot be programmed by user software. If the voltage on IRQ/V configuration and device operation will be disrupted. MC68HC705K1 — Rev. 2.0 For More Information On This Product PA3–PA0 enabled as external interrupt sources 0 = PA3–PA0 not enabled as external interrupt sources 1 = IRQ/V pin negative-edge triggered and low-level triggered ...
Page 90
... Freescale Semiconductor, Inc. EPROM/OTPROM Technical Data EPROM/OTPROM For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 91
... Introduction This section describes how to program the 64-bit personality erasable, programmable read-only memory (PEPROM). structure of the PEPROM subsystem. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 PEPROM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 PEPROM Bit Select Register . . . . . . . . . . . . . . . . . . . . . . . .93 PEPROM Status and Control Register .95 PEPROM Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96 PEPROM Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96 PEPROM Erasing ...
Page 92
... INTERNAL DATA BUS Technical Data RESET V PP ROW 0 ROW 1 ROW 2 ROW 3 ROW 4 ROW 5 ROW 6 ROW 7 8-TO-1 ROW DECODER AND MULTIPLEXER AND MULTIPLEXER RESET Figure 10-1. Personality EPROM Personality EPROM (PEPROM) For More Information On This Product, Go to: www.freescale.com V SWITCH PP ROW ZERO DECODER MC68HC705K1 — Rev. 2.0 ...
Page 93
... These read/write bits select one of 64 bits in the PEPROM as shown in Table PEB5–PEB3 select the PEPROM column. Reset clears PEB5–PEB0, selecting the PEPROM bit in row zero, column zero. MC68HC705K1 — Rev. 2.0 For More Information On This Product, PEPROM bit select register (PEBSR) PEPROM status and control register (PESCR) $000E ...
Page 94
... Row 4 $3D Row 5 $3E Row 6 $3F Row 7 Personality EPROM (PEPROM) For More Information On This Product, Go to: www.freescale.com Column 0 Column 0 Column 0 Column 0 Column 1 Column 1 Column 1 Column 1 Column 2 Column 2 Column 2 Column 6 Column 7 Column 7 Column 7 Column 7 Column 7 Column 7 Column 7 Column 7 MC68HC705K1 — Rev. 2.0 ...
Page 95
... This read-only bit is set when the PEPROM bit select register selects the first row (row zero) of the PEPROM array. Selecting any other row clears PEPRZF. Monitoring PEPRZF can reduce the code needed to access one byte of PEPROM. Reset sets PEPRZF. MC68HC705K1 — Rev. 2.0 For More Information On This Product, $000F Bit 7 ...
Page 96
... Figure 9-2. Programming Circuit must be greater than 4.5 Vdc. DD pin. This sequence shows how to program each PP PP personality EPROM data is stored. Personality EPROM (PEPROM) For More Information On This Product, Go to: www.freescale.com can be used applied to the IRQ/V pin, do not PP is raised above PP MC68HC705K1 — Rev. 2.0 ...
Page 97
... Position the ultraviolet light source 1 inch from the window. Do not use a shortwave filter. The erased state of a PEPROM bit is a logic 0. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Personality EPROM (PEPROM) Go to: www.freescale.com ...
Page 98
... Freescale Semiconductor, Inc. Personality EPROM (PEPROM) Technical Data Personality EPROM (PEPROM) For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 99
... MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 11. Instruction Set Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 Inherent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Immediate .101 Direct . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Extended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 Indexed, No Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102 Indexed, 8-Bit Offset .102 Indexed, 16-Bit Offset .102 Relative . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103 Instruction Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103 Register/Memory Instructions .104 Read-Modify-Write Instructions ...
Page 100
... The eight addressing modes are: • • • • • • • • Technical Data Inherent Immediate Direct Extended Indexed, no offset Indexed, 8-bit offset Indexed, 16-bit offset Relative Instruction Set For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 101
... When using the Motorola assembler, the programmer does not need to specify whether an instruction is direct or extended. The assembler automatically selects the shortest form of the instruction. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Instruction Set Go to: www.freescale.com ...
Page 102
... Indexed, 16-bit offset instructions are useful for selecting the kth element in an n-element table anywhere in memory. As with direct and extended addressing, the Motorola assembler determines the shortest form of indexed addressing. Technical Data Instruction Set For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 103
... Instruction Types The MCU instructions fall into five categories: • • • • • MC68HC705K1 — Rev. 2.0 For More Information On This Product, Register/memory instructions Read-modify-write instructions Jump/branch instructions Bit manipulation instructions Control instructions Instruction Set Go to: www ...
Page 104
... Store accumulator in memory Store index register in memory Subtract memory byte from accumulator Instruction Set For More Information On This Product, Go to: www.freescale.com Mnemonic ADC ADD AND BIT CMP CPX EOR LDA LDX MUL ORA SBC STA STX SUB MC68HC705K1 — Rev. 2.0 ...
Page 105
... These instructions read a memory location or a register, modify its contents, and write the modified value back to the memory location or to the register. NOTE: Do not use read-modify-write operations on write-only registers. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Table 11-2. Read-Modify-Write Instructions Instruction Arithmetic shift left (same as LSL) ...
Page 106
... The CPU also transfers the tested bit to the carry/borrow bit of the condition code register. Technical Data Instruction Set For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 107
... Freescale Semiconductor, Inc. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Table 11-3. Jump and Branch Instructions Instruction Branch if carry bit clear Branch if carry bit set Branch if equal Branch if half-carry bit clear Branch if half-carry bit set Branch if higher Branch if higher or same Branch if IRQ pin high ...
Page 108
... CPU can also test and branch based on the state of any bit in any of the first 256 memory locations. Technical Data Table 11-4. Bit Manipulation Instructions Instruction Bit clear Branch if bit clear Branch if bit set Bit set Instruction Set For More Information On This Product, Go to: www.freescale.com Mnemonic BCLR BRCLR BRSET BSET MC68HC705K1 — Rev. 2.0 ...
Page 109
... Freescale Semiconductor, Inc. 11.4.5 Control Instructions These instructions act on CPU registers and control CPU operation during program execution. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Table 11-5. Control Instructions Instruction Clear carry bit Clear interrupt mask No operation Reset stack pointer Return from interrupt ...
Page 110
... REL 27 — — — — — REL 28 — — — — — REL — — — — — REL 22 — — — — — REL 24 MC68HC705K1 — Rev. 2 ...
Page 111
... Branch Never BRSET n opr rel Branch if Bit n Set BSET n opr Set Bit n BSR rel Branch to Subroutine CLC Clear Carry Bit CLI Clear Interrupt Mask MC68HC705K1 — Rev. 2.0 For More Information On This Product, Description PC (PC rel ? IRQ = 1 PC (PC rel ? IRQ = 0 (A) (M) PC ...
Page 112
... IX2 D8 IX1 DIR 3C INH 4C — — — INH 5C IX1 DIR BC EXT CC — — — — — IX2 DC IX1 MC68HC705K1 — Rev. 2 ...
Page 113
... Logical OR Accumulator with Memory ORA opr,X ORA opr,X ORA ,X ROL opr ROLA ROLX Rotate Byte Left through Carry Bit ROL opr,X ROL ,X MC68HC705K1 — Rev. 2.0 For More Information On This Product, Description PC (PC Push (PCL); SP (SP) – 1 Push (PCH); SP (SP) – ...
Page 114
... IX2 DF IX1 IMM A0 DIR B0 EXT C0 — — IX2 D0 IX1 — 1 — — — INH 83 — — — — — INH 97 MC68HC705K1 — Rev. 2 ...
Page 115
... Indexed, no offset addressing mode IX1 Indexed, 8-bit offset addressing mode IX2 Indexed, 16-bit offset addressing mode M Memory location N Negative flag n Any bit 11.6 Opcode Map See Table MC68HC705K1 — Rev. 2.0 For More Information On This Product, Description (M) – $00 A (X) opr PC PCH PCL REL rel rr SP ...
Page 116
... Freescale Semiconductor, Inc. Instruction Set Technical Data Instruction Set For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
Page 117
... Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126 12.11 3.3-Volt Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127 12.12 Typical Oscillator Characteristics . . . . . . . . . . . . . . . . . . . . . .130 12.2 Introduction This section contains electrical and timing specifications. MC68HC705K1 — Rev. 2.0 For More Information On This Product, Section 12. Electrical Specifications Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .117 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118 Operating Temperature Range .118 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119 Power Considerations ...
Page 118
... For More Information On This Product, Go to: www.freescale.com within the range Out Symbol Value Unit V –0 –0 +0 –0 16 –65 to +150 STG and for guaranteed operating Symbol Value Unit –40 to +85 MC68HC705K1 — Rev. 2 ...
Page 119
... For most applications, P Ignoring P Solving equations (1) and (2) for K gives: where constant pertaining to the particular part. K can be determined from equation (3) by measuring P known T by solving equations (1) and (2) iteratively for any value of T MC68HC705K1 — Rev. 2.0 For More Information On This Product, Characteristic (1) ( ...
Page 120
... DD R2 TEST POINT C R1 PINS PA3–PA0, PB1–PB0 PA7–PA4 PA3–PA0, PB1–PB0 Figure 12-1. Equivalent Test Load Electrical Specifications For More Information On This Product, Go to: www.freescale.com 3. 4.5 V 470 2. 3.0 V 10. MC68HC705K1 — Rev. 2.0 ...
Page 121
... OSC2 Stop I measured with OSC1 = enabled, stop I can be as high All MCUs guaranteed to operate Programming voltage measured at IRQ/V MC68HC705K1 — Rev. 2.0 For More Information On This Product, (1) Symbol ...
Page 122
... M = 2.0 MHz). All inputs 0.2 V from rail – 0.2 V. With low-voltage reset IH DD MC68HC705K1 — Rev. 2 ...
Page 123
... Within the limited range of values shown, V versus I curves are approximately straight lines 5.0 V, devices are specified and tested for 3.3 V, devices are specified and tested for V DD Figure 12-3. Typical Low-Side Driver Characteristics MC68HC705K1 — Rev. 2.0 For More Information On This Product, 0.8 0.7 0.6 0.5 0.4 (NOTE 3) ...
Page 124
... Figure 12-4. Run I versus Internal Clock Frequency DD 900 800 700 5.5 V 4.5 V 600 3.6 V 500 3.0 V 400 300 200 100 0 0 0.5 INTERNAL CLOCK FREQUENCY (MHz) Figure 12-5. Wait I versus Internal Clock Frequency DD Electrical Specifications For More Information On This Product, Go to: www.freescale.com 1.0 1.5 2 1.0 1.5 2.0 MC68HC705K1 — Rev. 2.0 ...
Page 125
... Freescale Semiconductor, Inc. MC68HC705K1 — Rev. 2.0 For More Information On This Product, 3.3-Volt DC Electrical Characteristics 2500 2000 5.5 V 4.5 V 1500 3.6 V 3.0 V 1000 500 TEMPERATURE ( C) Figure 12-6. Stop I versus Temperature DD Electrical Specifications Go to: www.freescale.com Electrical Specifications 60 80 100 Technical Data ...
Page 126
... OXON t — 100 ILCH t 1.5 — 4.0 — RESL t 250 — ILIH t (6) — ILIL t 250 — IHIL t (6) — IHIH , t 200 — EPGM MC68HC705K1 — Rev. 2.0 Unit MHz MHz % % CYC t CYC ns t CYC ns t CYC ns ms ...
Page 127
... The 2-bit timer prescaler is the limiting factor in determining timer resolution. 6. The minimum period should not be less than the number of cycles it takes to execute the interrupt service ILIL IHIH routine plus CYC MC68HC705K1 — Rev. 2.0 For More Information On This Product, (1) Symbol f 2) (4) = – + ...
Page 128
... Edge- and level-triggered external interrupt mask option. 4. Reset vector shown as example. Figure 12-8. Stop Mode Recovery Timing Technical Data t ILIL t ILIH t ILIH 4064 t CYC 03FE 03FE 03FE (NOTE 4) Electrical Specifications For More Information On This Product, Go to: www.freescale.com 03FE 03FE 03FF RESET OR INTERRUPT VECTOR FETCH MC68HC705K1 — Rev. 2.0 ...
Page 129
... Internal clock, internal address bus, and internal data bus are not available externally. 2. The next rising edge of the internal clock after the rising edge of RESET initiates the reset sequence. Figure 12-10. External Reset Timing MC68HC705K1 — Rev. 2.0 For More Information On This Product, 4064 t ...
Page 130
... Supply Voltage 2 MHz 1 MHz Cumulative Frequency (1) Variations 2 MHz 1 MHz 10 – + Electrical Specifications For More Information On This Product, Go to: www.freescale.com 5.0 V Units –2100 –1600 ppm/ C –1100 –1100 1.0 0 0.3 0 MC68HC705K1 — Rev. 2.0 ...
Page 131
... Freescale Semiconductor, Inc. Figure 12-11. 2-Pin RC Oscillator R versus Frequency (V Figure 12-12. 3-Pin RC Oscillator R versus Frequency (V MC68HC705K1 — Rev. 2.0 For More Information On This Product 1000 800 600 400 200 Electrical Specifications Go to: www.freescale.com ...
Page 132
... Electrical Specifications For More Information On This Product, Go to: www.freescale.com 3 3 MC68HC705K1 — Rev. 2.0 ...
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... Technical Data — MC68HC705K1 13.1 Contents 13.2 13.3 13.4 13.5 13.2 Introduction Package dimensions available at the time of this publication for the MC68HC705K1 are provided in this section. The packages are: • • • To make sure that you have the latest case outline specifications, contact one of the following: • • ...
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... S 0.020 0.040 0.51 1.01 MILLIMETERS INCHES DIM MIN MAX MIN MAX A 10.15 10.45 0.400 0.411 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.50 0.90 0.020 0.035 G 1.27 BSC 0.050 BSC J 0.25 0.32 0.010 0.012 K 0.10 0.25 0.004 0.009 M 0° 7° 0° 7° P 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029 MC68HC705K1 — Rev. 2.0 ...
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... Freescale Semiconductor, Inc. 13.5 Ceramic Dual In-Line Package (Case 620 0.25 (0.010) MC68HC705K1 — Rev. 2.0 For More Information On This Product, Ceramic Dual In-Line Package (Case 620 16X 0.25 (0.010 SEATING T PLANE D 16X Mechanical Specifications Go to: www ...
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... Freescale Semiconductor, Inc. Mechanical Specifications Technical Data Mechanical Specifications For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... Introduction This section contains ordering information for the available package types. 13.3 MCU Order Numbers Table 13-1 Table 13-1. MC68HC705K1 Order Numbers Package Type 16-pin plastic dual in-line package (PDIP) 16-pin small outline integrated circuit (SOIC) 16-pin ceramic dual in-line package (cerdip) 16-pin plastic dual in-line package (PDIP) ...
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... Freescale Semiconductor, Inc. Ordering Information Technical Data Ordering Information For More Information On This Product, Go to: www.freescale.com MC68HC705K1 — Rev. 2.0 ...
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... Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 (800) 521-6274 480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center ...