mc68hc705k1 Freescale Semiconductor, Inc, mc68hc705k1 Datasheet - Page 88

• Manufacturer Part Number: mc68hc705k1
• Description: Hcmos Microcontroller Unit
• Manufacturer: Freescale Semiconductor, Inc

EPROM/OTPROM
Technical Data
SWPDI —Software Pulldown Inhibit Bit
PIN3 — 3-Pin RC Oscillator Bit
RC — RC Oscillator Bit
SWAIT — STOP Conversion to WAIT Bit
LVRE — Low-Voltage Reset Enable Bit
This EPROM bit inhibits software control of the port A and port B
pulldown devices.
This EPROM bit configures the on-chip oscillator as either a 3-pin
oscillator or as a 2-pin oscillator. The PIN3 bit should be cleared when
the RC bit is clear.
This EPROM bit configures the on-chip oscillator for an external RC
network.
This EPROM bit disables the STOP instruction and prevents
inadvertently turning off the COP watchdog with a STOP instruction.
When the SWAIT bit is set, a STOP instruction puts the MCU in halt
mode. Halt mode is a low-power state similar to wait mode. The
internal oscillator and timer clock continue to run, but the CPU clock
stops. When the SWAIT bit is clear, a STOP instruction stops the
internal oscillator, the internal clock, the CPU clock, and the timer
clock.
This EPROM bit enables the low-voltage reset (LVR) circuit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Software pulldown inhibited
0 = Software pulldown enabled
1 = 3-pin oscillator configured
0 = 2-pin oscillator configured
1 = Oscillator configured for external RC network
0 = Oscillator configured for external crystal, ceramic resonator, or
1 = STOP instruction converted to WAIT instruction
0 = STOP instruction not converted to WAIT instruction
1 = LVR circuit enabled
0 = LVR circuit disabled
clock source
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EPROM/OTPROM
MC68HC705K1 — Rev. 2.0