mc68hc705k1 Freescale Semiconductor, Inc, mc68hc705k1 Datasheet - Page 52

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mc68hc705k1

Manufacturer Part Number
mc68hc705k1
Description
Hcmos Microcontroller Unit
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Resets
5.3 Reset Types
5.3.1 Power-On Reset
5.3.2 External Reset
Technical Data
A reset immediately stops the operation of the instruction being
executed, initializes certain control bits, and loads the program counter
with a user-defined reset vector address. These conditions produce a
reset:
A positive transition on the V
power-on reset is strictly for power-up conditions and cannot be used to
detect drops in power supply voltage.
A 4064 t
active allows the clock generator to stabilize. If the RESET pin is at
logic 0 at the end of 4064 t
until the signal on the RESET pin goes to logic 1.
A logic 0 applied to the RESET pin for one and one-half t
an external reset. A Schmitt trigger senses the logic level at the RESET
pin.
A COP reset or an illegal address reset pulls the RESET pin low for one
internal clock cycle. A low-voltage reset pulls the RESET pin low for as
long as the low-voltage condition exists.
Freescale Semiconductor, Inc.
For More Information On This Product,
Initial power-up (power-on reset)
A logic 0 applied to the RESET pin (external reset)
Timeout of the computer operating properly (COP) watchdog
(COP reset)
An opcode fetch from an address not in the memory map (illegal
address reset)
V
DD
CYC
voltage below nominal 3.5 volts (low-voltage reset)
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(internal clock cycle) delay after the oscillator becomes
Resets
CYC
DD
, the MCU remains in the reset condition
pin generates a power-on reset. The
MC68HC705K1 — Rev. 2.0
CYC
generates

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