mc68hc711k4 Freescale Semiconductor, Inc, mc68hc711k4 Datasheet - Page 117

• Manufacturer Part Number: mc68hc711k4
• Description: Hcmos Microcontroller Unit
• Manufacturer: Freescale Semiconductor, Inc

5.5 Interrupts
M68HC11K Family
MOTOROLA
The MCU has 18 interrupt vectors that support 22 interrupt sources. The
19 maskable interrupts are generated by on-chip peripheral systems.
They are recognized when the I bit in the CCR is clear. The three
non-maskable interrupt sources are illegal opcode trap, software
interrupt, and XIRQ pin.
assignments for each source.
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– The RDRF, IDLE, OR, NF, FE, PF, and RAF receive-related
Serial peripheral interface (SPI)
– The SPI system is disabled by reset.
– The port pins associated with this function default to being
Analog-to-digital (A/D) converter
– The ADPU bit in the OPTION register is cleared, disabling the
– The conversion complete flag in the ADCTL register is also
System
– The external IRQ pin has the highest I-bit interrupt priority
– The RBOOT, SMOD, and MDA bits in the HPRIO register
– The IRQ pin is configured for level-sensitive operation for
– The DLY control bit in the OPTION register is set, enabling
– The clock monitor system is disabled because the CME and
status bits are cleared.
general-purpose I/O lines.
A/D system.
cleared.
because PSEL[4:0] in the HPRIO register are initialized with
the value %00110 (where % indicates a binary value).
reflect the status of the MODB and MODA inputs at the rising
edge of reset.
wired-OR systems.
oscillator startup delay after recovery from stop mode.
FCME bits in the OPTION register are cleared.
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Resets and Interrupts
Table 5-5
lists the interrupt sources and vector
Resets and Interrupts
Technical Data
Interrupts
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